*/
#include "cpu.h"
-#include "disas.h"
+#include "disas/disas.h"
#include "tcg-op.h"
#include "helper.h"
#include "mmu.h"
static TCGv env_btarget;
static TCGv env_pc;
-#include "gen-icount.h"
+#include "exec/gen-icount.h"
/* This is the state at translation time. */
typedef struct DisasContext {
tcg_temp_free(t_31);
}
-/* 64-bit signed mul, lower result in d and upper in d2. */
-static void t_gen_muls(TCGv d, TCGv d2, TCGv a, TCGv b)
-{
- TCGv_i64 t0, t1;
-
- t0 = tcg_temp_new_i64();
- t1 = tcg_temp_new_i64();
-
- tcg_gen_ext_i32_i64(t0, a);
- tcg_gen_ext_i32_i64(t1, b);
- tcg_gen_mul_i64(t0, t0, t1);
-
- tcg_gen_trunc_i64_i32(d, t0);
- tcg_gen_shri_i64(t0, t0, 32);
- tcg_gen_trunc_i64_i32(d2, t0);
-
- tcg_temp_free_i64(t0);
- tcg_temp_free_i64(t1);
-}
-
-/* 64-bit unsigned muls, lower result in d and upper in d2. */
-static void t_gen_mulu(TCGv d, TCGv d2, TCGv a, TCGv b)
-{
- TCGv_i64 t0, t1;
-
- t0 = tcg_temp_new_i64();
- t1 = tcg_temp_new_i64();
-
- tcg_gen_extu_i32_i64(t0, a);
- tcg_gen_extu_i32_i64(t1, b);
- tcg_gen_mul_i64(t0, t0, t1);
-
- tcg_gen_trunc_i64_i32(d, t0);
- tcg_gen_shri_i64(t0, t0, 32);
- tcg_gen_trunc_i64_i32(d2, t0);
-
- tcg_temp_free_i64(t0);
- tcg_temp_free_i64(t1);
-}
-
static void t_gen_cris_dstep(TCGv d, TCGv a, TCGv b)
{
int l1;
gen_helper_lz(dst, b);
break;
case CC_OP_MULS:
- t_gen_muls(dst, cpu_PR[PR_MOF], a, b);
+ tcg_gen_muls2_tl(dst, cpu_PR[PR_MOF], a, b);
break;
case CC_OP_MULU:
- t_gen_mulu(dst, cpu_PR[PR_MOF], a, b);
+ tcg_gen_mulu2_tl(dst, cpu_PR[PR_MOF], a, b);
break;
case CC_OP_DSTEP:
t_gen_cris_dstep(dst, a, b);
cris_cc_mask(dc, 0);
if (dc->op2 == 15) {
- t_gen_mov_env_TN(halted, tcg_const_tl(1));
+ tcg_gen_st_i32(tcg_const_i32(1), cpu_env,
+ -offsetof(CRISCPU, env) + offsetof(CPUState, halted));
tcg_gen_movi_tl(env_pc, dc->pc + 2);
t_gen_raise_exception(EXCP_HLT);
return 2;
*/
/* generate intermediate code for basic block 'tb'. */
-static void
-gen_intermediate_code_internal(CPUCRISState *env, TranslationBlock *tb,
- int search_pc)
+static inline void
+gen_intermediate_code_internal(CRISCPU *cpu, TranslationBlock *tb,
+ bool search_pc)
{
+ CPUCRISState *env = &cpu->env;
uint16_t *gen_opc_end;
uint32_t pc_start;
unsigned int insn_len;
int num_insns;
int max_insns;
- qemu_log_try_set_file(stderr);
-
if (env->pregs[PR_VR] == 32) {
dc->decoder = crisv32_decoder;
dc->clear_locked_irq = 0;
dc->env = env;
dc->tb = tb;
- gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
+ gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE;
dc->is_jmp = DISAS_NEXT;
dc->ppc = pc_start;
max_insns = CF_COUNT_MASK;
}
- gen_icount_start();
+ gen_tb_start();
do {
check_breakpoint(env, dc);
if (search_pc) {
- j = tcg_ctx.gen_opc_ptr - gen_opc_buf;
+ j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
if (lj < j) {
lj++;
while (lj < j) {
- gen_opc_instr_start[lj++] = 0;
+ tcg_ctx.gen_opc_instr_start[lj++] = 0;
}
}
if (dc->delayed_branch == 1) {
- gen_opc_pc[lj] = dc->ppc | 1;
+ tcg_ctx.gen_opc_pc[lj] = dc->ppc | 1;
} else {
- gen_opc_pc[lj] = dc->pc;
+ tcg_ctx.gen_opc_pc[lj] = dc->pc;
}
- gen_opc_instr_start[lj] = 1;
- gen_opc_icount[lj] = num_insns;
+ tcg_ctx.gen_opc_instr_start[lj] = 1;
+ tcg_ctx.gen_opc_icount[lj] = num_insns;
}
/* Pretty disas. */
break;
}
}
- gen_icount_end(tb, num_insns);
+ gen_tb_end(tb, num_insns);
*tcg_ctx.gen_opc_ptr = INDEX_op_end;
if (search_pc) {
- j = tcg_ctx.gen_opc_ptr - gen_opc_buf;
+ j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf;
lj++;
while (lj <= j) {
- gen_opc_instr_start[lj++] = 0;
+ tcg_ctx.gen_opc_instr_start[lj++] = 0;
}
} else {
tb->size = dc->pc - pc_start;
log_target_disas(env, pc_start, dc->pc - pc_start,
dc->env->pregs[PR_VR]);
qemu_log("\nisize=%d osize=%td\n",
- dc->pc - pc_start, tcg_ctx.gen_opc_ptr - gen_opc_buf);
+ dc->pc - pc_start, tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf);
}
#endif
#endif
void gen_intermediate_code (CPUCRISState *env, struct TranslationBlock *tb)
{
- gen_intermediate_code_internal(env, tb, 0);
+ gen_intermediate_code_internal(cris_env_get_cpu(env), tb, false);
}
void gen_intermediate_code_pc (CPUCRISState *env, struct TranslationBlock *tb)
{
- gen_intermediate_code_internal(env, tb, 1);
+ gen_intermediate_code_internal(cris_env_get_cpu(env), tb, true);
}
-void cpu_dump_state (CPUCRISState *env, FILE *f, fprintf_function cpu_fprintf,
- int flags)
+void cris_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,
+ int flags)
{
+ CRISCPU *cpu = CRIS_CPU(cs);
+ CPUCRISState *env = &cpu->env;
int i;
uint32_t srs;
}
-struct
+void cris_initialize_tcg(void)
{
- uint32_t vr;
- const char *name;
-} cris_cores[] = {
- {8, "crisv8"},
- {9, "crisv9"},
- {10, "crisv10"},
- {11, "crisv11"},
- {32, "crisv32"},
-};
-
-void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf)
-{
- unsigned int i;
-
- (*cpu_fprintf)(f, "Available CPUs:\n");
- for (i = 0; i < ARRAY_SIZE(cris_cores); i++) {
- (*cpu_fprintf)(f, " %s\n", cris_cores[i].name);
- }
-}
-
-static uint32_t vr_by_name(const char *name)
-{
- unsigned int i;
- for (i = 0; i < ARRAY_SIZE(cris_cores); i++) {
- if (strcmp(name, cris_cores[i].name) == 0) {
- return cris_cores[i].vr;
- }
- }
- return 32;
-}
-
-CRISCPU *cpu_cris_init(const char *cpu_model)
-{
- CRISCPU *cpu;
- CPUCRISState *env;
- static int tcg_initialized = 0;
int i;
- cpu = CRIS_CPU(object_new(TYPE_CRIS_CPU));
- env = &cpu->env;
-
- env->pregs[PR_VR] = vr_by_name(cpu_model);
-
- cpu_reset(CPU(cpu));
- qemu_init_vcpu(env);
-
- if (tcg_initialized) {
- return cpu;
- }
-
- tcg_initialized = 1;
-
#define GEN_HELPER 2
#include "helper.h"
- if (env->pregs[PR_VR] < 32) {
- cpu_crisv10_init(env);
- return cpu;
- }
-
-
cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
cc_x = tcg_global_mem_new(TCG_AREG0,
offsetof(CPUCRISState, cc_x), "cc_x");
offsetof(CPUCRISState, pregs[i]),
pregnames[i]);
}
-
- return cpu;
}
void restore_state_to_opc(CPUCRISState *env, TranslationBlock *tb, int pc_pos)
{
- env->pc = gen_opc_pc[pc_pos];
+ env->pc = tcg_ctx.gen_opc_pc[pc_pos];
}