}
/* multiply/divide */
+
+/* XXX: add eflags optimizations */
+/* XXX: add non P4 style flags */
+
void OPPROTO op_mulb_AL_T0(void)
{
unsigned int res;
res = (uint8_t)EAX * (uint8_t)T0;
EAX = (EAX & 0xffff0000) | res;
+ CC_DST = res;
CC_SRC = (res & 0xff00);
}
int res;
res = (int8_t)EAX * (int8_t)T0;
EAX = (EAX & 0xffff0000) | (res & 0xffff);
+ CC_DST = res;
CC_SRC = (res != (int8_t)res);
}
res = (uint16_t)EAX * (uint16_t)T0;
EAX = (EAX & 0xffff0000) | (res & 0xffff);
EDX = (EDX & 0xffff0000) | ((res >> 16) & 0xffff);
+ CC_DST = res;
CC_SRC = res >> 16;
}
res = (int16_t)EAX * (int16_t)T0;
EAX = (EAX & 0xffff0000) | (res & 0xffff);
EDX = (EDX & 0xffff0000) | ((res >> 16) & 0xffff);
+ CC_DST = res;
CC_SRC = (res != (int16_t)res);
}
res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
EAX = res;
EDX = res >> 32;
+ CC_DST = res;
CC_SRC = res >> 32;
}
res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
EAX = res;
EDX = res >> 32;
+ CC_DST = res;
CC_SRC = (res != (int32_t)res);
}
int res;
res = (int16_t)T0 * (int16_t)T1;
T0 = res;
+ CC_DST = res;
CC_SRC = (res != (int16_t)res);
}
int64_t res;
res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
T0 = res;
+ CC_DST = res;
CC_SRC = (res != (int32_t)res);
}
CC_OP = PARAM1;
}
-#define FL_UPDATE_MASK16 (FL_UPDATE_MASK32 & 0xffff)
+/* XXX: clear VIF/VIP in all ops ? */
void OPPROTO op_movl_eflags_T0(void)
{
- int eflags;
- eflags = T0;
- CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
- DF = 1 - (2 * ((eflags >> 10) & 1));
- /* we also update some system flags as in user mode */
- env->eflags = (env->eflags & ~FL_UPDATE_MASK32) |
- (eflags & FL_UPDATE_MASK32);
+ load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK));
}
void OPPROTO op_movw_eflags_T0(void)
{
- int eflags;
- eflags = T0;
- CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
- DF = 1 - (2 * ((eflags >> 10) & 1));
- /* we also update some system flags as in user mode */
- env->eflags = (env->eflags & ~FL_UPDATE_MASK16) |
- (eflags & FL_UPDATE_MASK16);
+ load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK) & 0xffff);
+}
+
+void OPPROTO op_movl_eflags_T0_io(void)
+{
+ load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | IF_MASK));
+}
+
+void OPPROTO op_movw_eflags_T0_io(void)
+{
+ load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | IF_MASK) & 0xffff);
}
void OPPROTO op_movl_eflags_T0_cpl0(void)
{
- load_eflags(T0, FL_UPDATE_CPL0_MASK);
+ load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | IF_MASK | IOPL_MASK));
}
void OPPROTO op_movw_eflags_T0_cpl0(void)
{
- load_eflags(T0, FL_UPDATE_CPL0_MASK & 0xffff);
+ load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | IF_MASK | IOPL_MASK) & 0xffff);
}
#if 0
return CC_SRC & CC_C;
}
-static int compute_c_mul(void)
-{
- int cf;
- cf = (CC_SRC != 0);
- return cf;
-}
-
-static int compute_all_mul(void)
-{
- int cf, pf, af, zf, sf, of;
- cf = (CC_SRC != 0);
- pf = 0; /* undefined */
- af = 0; /* undefined */
- zf = 0; /* undefined */
- sf = 0; /* undefined */
- of = cf << 11;
- return cf | pf | af | zf | sf | of;
-}
-
CCTable cc_table[CC_OP_NB] = {
[CC_OP_DYNAMIC] = { /* should never happen */ },
[CC_OP_EFLAGS] = { compute_all_eflags, compute_c_eflags },
- [CC_OP_MUL] = { compute_all_mul, compute_c_mul },
+ [CC_OP_MULB] = { compute_all_mulb, compute_c_mull },
+ [CC_OP_MULW] = { compute_all_mulw, compute_c_mull },
+ [CC_OP_MULL] = { compute_all_mull, compute_c_mull },
[CC_OP_ADDB] = { compute_all_addb, compute_c_addb },
[CC_OP_ADDW] = { compute_all_addw, compute_c_addw },