target-i386/helper: remove EDX macro

[qemu.git] / target-i386 / seg_helper.c

diff --git a/target-i386/seg_helper.c b/target-i386/seg_helper.c
index 60d723abf8d8fe601cbd8a1358e9dc8f41aa7318..fc67f5212fb3b8b873ae9bb55a79d70b51f9bf49 100644 (file)
--- a/target-i386/seg_helper.c
+++ b/target-i386/seg_helper.c
@@ -326,7 +326,7 @@ static void switch_tss(CPUX86State *env, int tss_selector,
         cpu_stl_kernel(env, env->tr.base + 0x24, old_eflags);
         cpu_stl_kernel(env, env->tr.base + (0x28 + 0 * 4), env->regs[R_EAX]);
         cpu_stl_kernel(env, env->tr.base + (0x28 + 1 * 4), env->regs[R_ECX]);
-        cpu_stl_kernel(env, env->tr.base + (0x28 + 2 * 4), EDX);
+        cpu_stl_kernel(env, env->tr.base + (0x28 + 2 * 4), env->regs[R_EDX]);
         cpu_stl_kernel(env, env->tr.base + (0x28 + 3 * 4), env->regs[R_EBX]);
         cpu_stl_kernel(env, env->tr.base + (0x28 + 4 * 4), ESP);
         cpu_stl_kernel(env, env->tr.base + (0x28 + 5 * 4), EBP);
@@ -342,7 +342,7 @@ static void switch_tss(CPUX86State *env, int tss_selector,
         cpu_stw_kernel(env, env->tr.base + 0x10, old_eflags);
         cpu_stw_kernel(env, env->tr.base + (0x12 + 0 * 2), env->regs[R_EAX]);
         cpu_stw_kernel(env, env->tr.base + (0x12 + 1 * 2), env->regs[R_ECX]);
-        cpu_stw_kernel(env, env->tr.base + (0x12 + 2 * 2), EDX);
+        cpu_stw_kernel(env, env->tr.base + (0x12 + 2 * 2), env->regs[R_EDX]);
         cpu_stw_kernel(env, env->tr.base + (0x12 + 3 * 2), env->regs[R_EBX]);
         cpu_stw_kernel(env, env->tr.base + (0x12 + 4 * 2), ESP);
         cpu_stw_kernel(env, env->tr.base + (0x12 + 5 * 2), EBP);
@@ -398,7 +398,7 @@ static void switch_tss(CPUX86State *env, int tss_selector,
     /* XXX: what to do in 16 bit case? */
     env->regs[R_EAX] = new_regs[0];
     env->regs[R_ECX] = new_regs[1];
-    EDX = new_regs[2];
+    env->regs[R_EDX] = new_regs[2];
     env->regs[R_EBX] = new_regs[3];
     ESP = new_regs[4];
     EBP = new_regs[5];
@@ -2289,7 +2289,7 @@ void helper_sysexit(CPUX86State *env, int dflag)
                                DESC_W_MASK | DESC_A_MASK);
     }
     ESP = env->regs[R_ECX];
-    EIP = EDX;
+    EIP = env->regs[R_EDX];
 }
 
 target_ulong helper_lsl(CPUX86State *env, target_ulong selector1)