*/
#include "cpu.h"
-#include "host-utils.h"
+#include "qemu/host-utils.h"
int cpu_lm32_handle_mmu_fault(CPULM32State *env, target_ulong address, int rw,
int mmu_idx)
return 0;
}
-target_phys_addr_t cpu_get_phys_page_debug(CPULM32State *env, target_ulong addr)
+hwaddr cpu_get_phys_page_debug(CPULM32State *env, target_ulong addr)
{
return addr & TARGET_PAGE_MASK;
}
return cfg;
}
-CPULM32State *cpu_lm32_init(const char *cpu_model)
+LM32CPU *cpu_lm32_init(const char *cpu_model)
{
LM32CPU *cpu;
CPULM32State *env;
lm32_translate_init();
}
- return env;
+ return cpu;
}
/* Some soc ignores the MSB on the address bus. Thus creating a shadow memory
env->flags &= ~LM32_FLAG_IGNORE_MSB;
}
}
-
-void cpu_state_reset(CPULM32State *env)
-{
- cpu_reset(ENV_GET_CPU(env));
-}
-