uint32_t pc;
uint32_t sr;
+ /* SSP and USP. The current_sp is stored in aregs[7], the other here. */
+ int current_sp;
+ uint32_t sp[2];
+
/* Condition flags. */
uint32_t cc_op;
uint32_t cc_dest;
uint32_t vbr;
uint32_t mbar;
uint32_t rambar0;
+ uint32_t cacr;
uint32_t features;
#define SR_S 0x2000
#define SR_T 0x8000
+#define M68K_SSP 0
+#define M68K_USP 1
+
+/* CACR fields are implementation defined, but some bits are common. */
+#define M68K_CACR_EUSP 0x10
+
#define MACSR_PAV0 0x100
#define MACSR_OMC 0x080
#define MACSR_SU 0x040
void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector);
void m68k_set_macsr(CPUM68KState *env, uint32_t val);
+void m68k_switch_sp(CPUM68KState *env);
#define M68K_FPCR_PREC (1 << 6)
M68K_FEATURE_CF_FPU,
M68K_FEATURE_CF_MAC,
M68K_FEATURE_CF_EMAC,
+ M68K_FEATURE_USP,
M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */
M68K_FEATURE_WORD_INDEX /* word sized address index registers. */
};