/*
* m68k virtual CPU header
- *
+ *
* Copyright (c) 2005-2007 CodeSourcery
* Written by Paul Brook
*
* General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef CPU_M68K_H
#define CPU_M68K_H
#define TARGET_LONG_BITS 32
-#include "cpu-defs.h"
+#define CPUArchState struct CPUM68KState
+
+#include "config.h"
+#include "qemu-common.h"
+#include "exec/cpu-defs.h"
-#include "softfloat.h"
+#include "fpu/softfloat.h"
#define MAX_QREGS 32
#define EXCP_RTE 0x100
#define EXCP_HALT_INSN 0x101
+#define NB_MMU_MODES 2
+
typedef struct CPUM68KState {
uint32_t dregs[8];
uint32_t aregs[8];
/* Temporary storage for DIV helpers. */
uint32_t div1;
uint32_t div2;
-
+
/* MMU status. */
struct {
uint32_t ar;
uint32_t rambar0;
uint32_t cacr;
- uint32_t features;
-
- /* ??? remove this. */
- uint32_t t1;
-
- /* exception/interrupt handling */
- jmp_buf jmp_env;
- int exception_index;
- int interrupt_request;
- int user_mode_only;
- int halted;
-
int pending_vector;
int pending_level;
uint32_t qregs[MAX_QREGS];
CPU_COMMON
+
+ uint32_t features;
} CPUM68KState;
-CPUM68KState *cpu_m68k_init(void);
+#include "cpu-qom.h"
+
+void m68k_tcg_init(void);
+CPUM68KState *cpu_m68k_init(const char *cpu_model);
int cpu_m68k_exec(CPUM68KState *s);
-void cpu_m68k_close(CPUM68KState *s);
-void do_interrupt(int is_hw);
+void do_interrupt(CPUM68KState *env1);
+void do_interrupt_m68k_hardirq(CPUM68KState *env1);
/* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero
is returned if the signal was handled by the virtual CPU. */
-int cpu_m68k_signal_handler(int host_signum, void *pinfo,
+int cpu_m68k_signal_handler(int host_signum, void *pinfo,
void *puc);
void cpu_m68k_flush_flags(CPUM68KState *, int);
CC_OP_CMPW, /* CC_DEST = result, CC_SRC = source */
CC_OP_ADDX, /* CC_DEST = result, CC_SRC = source */
CC_OP_SUBX, /* CC_DEST = result, CC_SRC = source */
- CC_OP_SHL, /* CC_DEST = source, CC_SRC = shift */
- CC_OP_SHR, /* CC_DEST = source, CC_SRC = shift */
- CC_OP_SAR, /* CC_DEST = source, CC_SRC = shift */
+ CC_OP_SHIFT, /* CC_DEST = result, CC_SRC = carry */
};
#define CCF_C 0x01
#define MACSR_V 0x002
#define MACSR_EV 0x001
-typedef struct m68k_def_t m68k_def_t;
-
-int cpu_m68k_set_model(CPUM68KState *env, const char * name);
-
void m68k_set_irq_level(CPUM68KState *env, int level, uint8_t vector);
void m68k_set_macsr(CPUM68KState *env, uint32_t val);
void m68k_switch_sp(CPUM68KState *env);
void do_m68k_semihosting(CPUM68KState *env, int nr);
+/* There are 4 ColdFire core ISA revisions: A, A+, B and C.
+ Each feature covers the subset of instructions common to the
+ ISA revisions mentioned. */
+
enum m68k_features {
M68K_FEATURE_CF_ISA_A,
- M68K_FEATURE_CF_ISA_B,
- M68K_FEATURE_CF_ISA_C,
+ M68K_FEATURE_CF_ISA_B, /* (ISA B or C). */
+ M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
+ M68K_FEATURE_BRAL, /* Long unconditional branch. (ISA A+ or B). */
M68K_FEATURE_CF_FPU,
M68K_FEATURE_CF_MAC,
M68K_FEATURE_CF_EMAC,
- M68K_FEATURE_USP,
+ M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate). */
+ M68K_FEATURE_USP, /* User Stack Pointer. (ISA A+, B or C). */
M68K_FEATURE_EXT_FULL, /* 68020+ full extension word. */
M68K_FEATURE_WORD_INDEX /* word sized address index registers. */
};
return (env->features & (1u << feature)) != 0;
}
+void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf);
+
void register_m68k_insns (CPUM68KState *env);
#ifdef CONFIG_USER_ONLY
/* Linux uses 8k pages. */
#define TARGET_PAGE_BITS 13
#else
-/* Smallest TLB entry size is 1k. */
+/* Smallest TLB entry size is 1k. */
#define TARGET_PAGE_BITS 10
#endif
-#include "cpu-all.h"
+
+#define TARGET_PHYS_ADDR_SPACE_BITS 32
+#define TARGET_VIRT_ADDR_SPACE_BITS 32
+
+#define cpu_init cpu_m68k_init
+#define cpu_exec cpu_m68k_exec
+#define cpu_gen_code cpu_m68k_gen_code
+#define cpu_signal_handler cpu_m68k_signal_handler
+#define cpu_list m68k_cpu_list
+
+/* MMU modes definitions */
+#define MMU_MODE0_SUFFIX _kernel
+#define MMU_MODE1_SUFFIX _user
+#define MMU_USER_IDX 1
+static inline int cpu_mmu_index (CPUM68KState *env)
+{
+ return (env->sr & SR_S) == 0 ? 1 : 0;
+}
+
+int cpu_m68k_handle_mmu_fault(CPUM68KState *env, target_ulong address, int rw,
+ int mmu_idx);
+#define cpu_handle_mmu_fault cpu_m68k_handle_mmu_fault
+
+#if defined(CONFIG_USER_ONLY)
+static inline void cpu_clone_regs(CPUM68KState *env, target_ulong newsp)
+{
+ if (newsp)
+ env->aregs[7] = newsp;
+ env->dregs[0] = 0;
+}
+#endif
+
+#include "exec/cpu-all.h"
+
+static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
+ target_ulong *cs_base, int *flags)
+{
+ *pc = env->pc;
+ *cs_base = 0;
+ *flags = (env->fpcr & M68K_FPCR_PREC) /* Bit 6 */
+ | (env->sr & SR_S) /* Bit 13 */
+ | ((env->macsr >> 4) & 0xf); /* Bits 0-3 */
+}
+
+static inline bool cpu_has_work(CPUState *cpu)
+{
+ CPUM68KState *env = &M68K_CPU(cpu)->env;
+
+ return env->interrupt_request & CPU_INTERRUPT_HARD;
+}
+
+#include "exec/exec-all.h"
+
+static inline void cpu_pc_from_tb(CPUM68KState *env, TranslationBlock *tb)
+{
+ env->pc = tb->pc;
+}
#endif
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