#include "config.h"
#include "cpu.h"
-#include "exec-all.h"
#include "qemu-common.h"
#include "gdbstub.h"
M68K_CPUID_ANY,
};
-typedef struct m68k_def a_m68k_def;
+typedef struct m68k_def_t m68k_def_t;
-struct m68k_def {
+struct m68k_def_t {
const char * name;
enum m68k_cpuid id;
};
-static a_m68k_def m68k_cpu_defs[] = {
+static m68k_def_t m68k_cpu_defs[] = {
{"m5206", M68K_CPUID_M5206},
{"m5208", M68K_CPUID_M5208},
{"cfv4e", M68K_CPUID_CFV4E},
{NULL, 0},
};
-void m68k_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
+void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
unsigned int i;
static int cpu_m68k_set_model(CPUM68KState *env, const char *name)
{
- a_m68k_def *def;
+ m68k_def_t *def;
for (def = m68k_cpu_defs; def->name; def++) {
if (strcmp(def->name, name) == 0)
env->current_sp = new_sp;
}
-/* MMU */
-
-/* TODO: This will need fixing once the MMU is implemented. */
-a_target_phys_addr cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
-{
- return addr;
-}
-
#if defined(CONFIG_USER_ONLY)
int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
#else
+/* MMU */
+
+/* TODO: This will need fixing once the MMU is implemented. */
+target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
+{
+ return addr;
+}
+
int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
int mmu_idx, int is_softmmu)
{
int prot;
address &= TARGET_PAGE_MASK;
- prot = PAGE_READ | PAGE_WRITE;
- return tlb_set_page(env, address, address, prot, mmu_idx, is_softmmu);
+ prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
+ tlb_set_page(env, address, address, prot, mmu_idx, TARGET_PAGE_SIZE);
+ return 0;
}
/* Notify CPU of a pending interrupt. Prioritization and vectoring should
/* ??? Should flush denormals to zero. */
float64 res;
res = float64_sub(a, b, &env->fp_status);
- if (float64_is_nan(res)) {
+ if (float64_is_quiet_nan(res)) {
/* +/-inf compares equal against itself, but sub returns nan. */
- if (!float64_is_nan(a)
- && !float64_is_nan(b)) {
+ if (!float64_is_quiet_nan(a)
+ && !float64_is_quiet_nan(b)) {
res = float64_zero;
if (float64_lt_quiet(a, res, &env->fp_status))
res = float64_chs(res);
if (env->macsr & MACSR_V) {
env->macsr |= MACSR_PAV0 << acc;
if (env->macsr & MACSR_OMC) {
- /* The result is saturated to 32 bits, despite overflow occuring
+ /* The result is saturated to 32 bits, despite overflow occurring
at 48 bits. Seems weird, but that's what the hardware docs
say. */
result = (result >> 63) ^ 0x7fffffff;
{
uint64_t val;
val = env->macc[acc];
- if (val == 0)
+ if (val == 0) {
env->macsr |= MACSR_Z;
- else if (val & (1ull << 47));
+ } else if (val & (1ull << 47)) {
env->macsr |= MACSR_N;
+ }
if (env->macsr & (MACSR_PAV0 << acc)) {
env->macsr |= MACSR_V;
}