Get rid of _t suffix

[qemu.git] / target-microblaze / op_helper.c

diff --git a/target-microblaze/op_helper.c b/target-microblaze/op_helper.c
index a5b38273540054bb7453971636e6603f97332f5a..63c5225c96e149f6ecf44c1a1349a606c774b41e 100644 (file)
--- a/target-microblaze/op_helper.c
+++ b/target-microblaze/op_helper.c
@@ -206,29 +206,21 @@ uint32_t helper_pcmpbf(uint32_t a, uint32_t b)
     return 0;
 }
 
-void helper_memalign(uint32_t addr, uint32_t dr, uint32_t wr, uint32_t size)
+void helper_memalign(uint32_t addr, uint32_t dr, uint32_t wr, uint32_t mask)
 {
-    uint32_t mask;
-
-    switch (size) {
-        case 4: mask = 3; break;
-        case 2: mask = 1; break;
-        default:
-        case 1: mask = 0; break;
-    }
-
     if (addr & mask) {
-            qemu_log("unaligned access addr=%x size=%d, wr=%d\n",
-                     addr, size, wr);
-            if (!(env->sregs[SR_MSR] & MSR_EE)) {
-                return;
-            }
-
+            qemu_log_mask(CPU_LOG_INT,
+                          "unaligned access addr=%x mask=%x, wr=%d dr=r%d\n",
+                          addr, mask, wr, dr);
+            env->sregs[SR_EAR] = addr;
             env->sregs[SR_ESR] = ESR_EC_UNALIGNED_DATA | (wr << 10) \
                                  | (dr & 31) << 5;
-            if (size == 4) {
+            if (mask == 3) {
                 env->sregs[SR_ESR] |= 1 << 11;
             }
+            if (!(env->sregs[SR_MSR] & MSR_EE)) {
+                return;
+            }
             helper_raise_exception(EXCP_HW_EXCP);
     }
 }
@@ -245,3 +237,31 @@ void helper_mmu_write(uint32_t rn, uint32_t v)
     mmu_write(env, rn, v);
 }
 #endif
+
+void do_unassigned_access(a_target_phys_addr addr, int is_write, int is_exec,
+                          int is_asi, int size)
+{
+    CPUState *saved_env;
+    /* XXX: hack to restore env in all cases, even if not called from
+       generated code */
+    saved_env = env;
+    env = cpu_single_env;
+    qemu_log_mask(CPU_LOG_INT, "Unassigned " TARGET_FMT_plx " wr=%d exe=%d\n",
+             addr, is_write, is_exec);
+    if (!(env->sregs[SR_MSR] & MSR_EE)) {
+        return;
+    }
+
+    env->sregs[SR_EAR] = addr;
+    if (is_exec) {
+        if ((env->pvr.regs[2] & PVR2_IOPB_BUS_EXC_MASK)) {
+            env->sregs[SR_ESR] = ESR_EC_INSN_BUS;
+            helper_raise_exception(EXCP_HW_EXCP);
+        }
+    } else {
+        if ((env->pvr.regs[2] & PVR2_DOPB_BUS_EXC_MASK)) {
+            env->sregs[SR_ESR] = ESR_EC_DATA_BUS;
+            helper_raise_exception(EXCP_HW_EXCP);
+        }
+    }
+}