Merge remote-tracking branch 'aneesh/for-upstream' into staging

[qemu.git] / target-mips / TODO

diff --git a/target-mips/TODO b/target-mips/TODO
index a5842ff27612bb6b6023b9dbb1c7f6e3267543b8..2a3546f6247cc98ec6a5c2991fe6085900ecc237 100644 (file)
--- a/target-mips/TODO
+++ b/target-mips/TODO
@@ -3,24 +3,41 @@ Unsolved issues/bugs in the mips/mipsel backend
 
 General
 -------
-- [ls][dw][lr] report broken (aligned) BadVAddr
-- Missing per-CPU instruction decoding, currently all implemented
-  instructions are regarded as valid
-- Applications running on top of a emulated Linux segfault sometimes
-  when the Qemu FPU emulation is disabled. Also gdb inside the emulated
-  system does not work. Both problems are caused by insufficient
-  handling of self-modifying code.
-- Floating point exception emulation is incomplete.
+- Unimplemented ASEs:
+  - MDMX
+  - SmartMIPS
+  - DSP r1
+  - DSP r2
+- MT ASE only partially implemented and not functional
+- Shadow register support only partially implemented,
+  lacks set switching on interrupt/exception.
+- 34K ITC not implemented.
+- A general lack of documentation, especially for technical internals.
+  Existing documentation is x86-centric.
+- Reverse endianness bit not implemented
+- The TLB emulation is very inefficient:
+  QEMU's softmmu implements a x86-style MMU, with separate entries
+  for read/write/execute, a TLB index which is just a modulo of the
+  virtual address, and a set of TLBs for each user/kernel/supervisor
+  MMU mode.
+  MIPS has a single entry for read/write/execute and only one MMU mode.
+  But it is fully associative with randomized entry indices, and uses
+  up to 256 ASID tags as additional matching criterion (which roughly
+  equates to 256 MMU modes). It also has a global flag which causes
+  entries to match regardless of ASID.
+  To cope with these differences, QEMU currently flushes the TLB at
+  each ASID change. Using the MMU modes to implement ASIDs hinges on
+  implementing the global bit efficiently.
+- save/restore of the CPU state is not implemented (see machine.c).
 
 MIPS64
 ------
-- No 64bit TLB support
-- 64bit FPU not fully implemented
-- 64bit mul/div handling broken
+- Userland emulation (both n32 and n64) not functional.
 
 "Generic" 4Kc system emulation
 ------------------------------
-- Doesn't correspond to any real hardware.
+- Doesn't correspond to any real hardware. Should be removed some day,
+  U-Boot is the last remaining user.
 
 PICA 61 system emulation
 ------------------------
@@ -29,5 +46,7 @@ PICA 61 system emulation
 MALTA system emulation
 ----------------------
 - We fake firmware support instead of doing the real thing
-- Real firmware falls over when trying to init RAM, presumably due
-  to lacking system controller emulation.
+- Real firmware (YAMON) falls over when trying to init RAM, presumably
+  due to lacking system controller emulation.
+- Bonito system controller not implemented
+- MSC1 system controller not implemented