Move the active FPU registers into env again, and use more TCG registers

[qemu.git] / target-mips / TODO

diff --git a/target-mips/TODO b/target-mips/TODO
index bb18fa8d85d633af9bec04d8e6d2af14ead7f5ae..4769e2a3ae5eb1066e608848b182a05a727fcc26 100644 (file)
--- a/target-mips/TODO
+++ b/target-mips/TODO
@@ -30,11 +30,6 @@ General
   each ASID change. Using the MMU modes to implement ASIDs hinges on
   implementing the global bit efficiently.
 - save/restore of the CPU state is not implemented (see machine.c).
-- Improve cpu state handling:
-  Step 1) Collect all the TC state in a single struct, so we need only
-          a single global pointer for the active TC.
-  Step 2) Use only a single TC context as working context, and copy the
-          contexts on TC switch. Likewise for FPU contexts.
 
 MIPS64
 ------