mips: more fixes to the MIPS interrupt glue logic

[qemu.git] / target-mips / cpu.h

diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 157885082a9031afc778625822de75e1a0c9cd6f..b8e6feefc2c2a092f01ef3d0cee96ab7e8e1f675 100644 (file)
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -597,6 +597,9 @@ void cpu_mips_store_compare (CPUState *env, uint32_t value);
 void cpu_mips_start_count(CPUState *env);
 void cpu_mips_stop_count(CPUState *env);
 
+/* mips_int.c */
+void cpu_mips_soft_irq(CPUState *env, int irq, int level);
+
 /* helper.c */
 int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
                                int mmu_idx, int is_softmmu);