Merge remote-tracking branch 'bonzini/configure' into staging

[qemu.git] / target-openrisc / gdbstub.c

diff --git a/target-openrisc/gdbstub.c b/target-openrisc/gdbstub.c
index fba096aa1cf3089c50cce467c1fa45b66742af88..18bcc46167b22ae199b4fb50ba5b203a4f8335af 100644 (file)
--- a/target-openrisc/gdbstub.c
+++ b/target-openrisc/gdbstub.c
@@ -17,21 +17,27 @@
  * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
+#include "config.h"
+#include "qemu-common.h"
+#include "exec/gdbstub.h"
 
-static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n)
+int openrisc_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
 {
+    OpenRISCCPU *cpu = OPENRISC_CPU(cs);
+    CPUOpenRISCState *env = &cpu->env;
+
     if (n < 32) {
-        GET_REG32(env->gpr[n]);
+        return gdb_get_reg32(mem_buf, env->gpr[n]);
     } else {
         switch (n) {
         case 32:    /* PPC */
-            GET_REG32(env->ppc);
+            return gdb_get_reg32(mem_buf, env->ppc);
 
         case 33:    /* NPC */
-            GET_REG32(env->npc);
+            return gdb_get_reg32(mem_buf, env->npc);
 
         case 34:    /* SR */
-            GET_REG32(env->sr);
+            return gdb_get_reg32(mem_buf, env->sr);
 
         default:
             break;
@@ -40,11 +46,11 @@ static int cpu_gdb_read_register(CPUOpenRISCState *env, uint8_t *mem_buf, int n)
     return 0;
 }
 
-static int cpu_gdb_write_register(CPUOpenRISCState *env,
-                                  uint8_t *mem_buf, int n)
+int openrisc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
 {
-    OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
-    CPUClass *cc = CPU_GET_CLASS(cpu);
+    OpenRISCCPU *cpu = OPENRISC_CPU(cs);
+    CPUClass *cc = CPU_GET_CLASS(cs);
+    CPUOpenRISCState *env = &cpu->env;
     uint32_t tmp;
 
     if (n > cc->gdb_num_core_regs) {