Avoid asprintf() which is not available on mingw

[qemu.git] / target-s390x / helper.c

diff --git a/target-s390x/helper.c b/target-s390x/helper.c
index 1a1cc0eb152b0f8512c1d1e5f65f95e1f0968fb4..d0a1180a83404243ed6d7ac4e62b4b83230f047d 100644 (file)
--- a/target-s390x/helper.c
+++ b/target-s390x/helper.c
@@ -51,63 +51,52 @@
 #endif
 
 #ifndef CONFIG_USER_ONLY
-static void s390x_tod_timer(void *opaque)
+void s390x_tod_timer(void *opaque)
 {
-    CPUState *env = opaque;
+    S390CPU *cpu = opaque;
+    CPUS390XState *env = &cpu->env;
 
     env->pending_int |= INTERRUPT_TOD;
     cpu_interrupt(env, CPU_INTERRUPT_HARD);
 }
 
-static void s390x_cpu_timer(void *opaque)
+void s390x_cpu_timer(void *opaque)
 {
-    CPUState *env = opaque;
+    S390CPU *cpu = opaque;
+    CPUS390XState *env = &cpu->env;
 
     env->pending_int |= INTERRUPT_CPUTIMER;
     cpu_interrupt(env, CPU_INTERRUPT_HARD);
 }
 #endif
 
-CPUS390XState *cpu_s390x_init(const char *cpu_model)
+S390CPU *cpu_s390x_init(const char *cpu_model)
 {
+    S390CPU *cpu;
     CPUS390XState *env;
-#if !defined (CONFIG_USER_ONLY)
-    struct tm tm;
-#endif
     static int inited = 0;
-    static int cpu_num = 0;
 
-    env = g_malloc0(sizeof(CPUS390XState));
-    cpu_exec_init(env);
+    cpu = S390_CPU(object_new(TYPE_S390_CPU));
+    env = &cpu->env;
+
     if (tcg_enabled() && !inited) {
         inited = 1;
         s390x_translate_init();
     }
 
-#if !defined(CONFIG_USER_ONLY)
-    qemu_get_timedate(&tm, 0);
-    env->tod_offset = TOD_UNIX_EPOCH +
-                      (time2tod(mktimegm(&tm)) * 1000000000ULL);
-    env->tod_basetime = 0;
-    env->tod_timer = qemu_new_timer_ns(vm_clock, s390x_tod_timer, env);
-    env->cpu_timer = qemu_new_timer_ns(vm_clock, s390x_cpu_timer, env);
-#endif
     env->cpu_model_str = cpu_model;
-    env->cpu_num = cpu_num++;
-    env->ext_index = -1;
-    cpu_state_reset(env);
     qemu_init_vcpu(env);
-    return env;
+    return cpu;
 }
 
 #if defined(CONFIG_USER_ONLY)
 
-void do_interrupt (CPUState *env)
+void do_interrupt (CPUS390XState *env)
 {
     env->exception_index = -1;
 }
 
-int cpu_s390x_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
+int cpu_s390x_handle_mmu_fault (CPUS390XState *env, target_ulong address, int rw,
                                 int mmu_idx)
 {
     /* fprintf(stderr,"%s: address 0x%lx rw %d mmu_idx %d\n",
@@ -117,32 +106,17 @@ int cpu_s390x_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
     return 1;
 }
 
-#endif /* CONFIG_USER_ONLY */
-
-void cpu_state_reset(CPUS390XState *env)
-{
-    if (qemu_loglevel_mask(CPU_LOG_RESET)) {
-        qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
-        log_cpu_state(env, 0);
-    }
-
-    memset(env, 0, offsetof(CPUS390XState, breakpoints));
-    /* FIXME: reset vector? */
-    tlb_flush(env, 1);
-    s390_add_running_cpu(env);
-}
-
-#ifndef CONFIG_USER_ONLY
+#else /* !CONFIG_USER_ONLY */
 
 /* Ensure to exit the TB after this call! */
-static void trigger_pgm_exception(CPUState *env, uint32_t code, uint32_t ilc)
+static void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ilc)
 {
     env->exception_index = EXCP_PGM;
     env->int_pgm_code = code;
     env->int_pgm_ilc = ilc;
 }
 
-static int trans_bits(CPUState *env, uint64_t mode)
+static int trans_bits(CPUS390XState *env, uint64_t mode)
 {
     int bits = 0;
 
@@ -164,7 +138,7 @@ static int trans_bits(CPUState *env, uint64_t mode)
     return bits;
 }
 
-static void trigger_prot_fault(CPUState *env, target_ulong vaddr, uint64_t mode)
+static void trigger_prot_fault(CPUS390XState *env, target_ulong vaddr, uint64_t mode)
 {
     int ilc = ILC_LATER_INC_2;
     int bits = trans_bits(env, mode) | 4;
@@ -175,7 +149,7 @@ static void trigger_prot_fault(CPUState *env, target_ulong vaddr, uint64_t mode)
     trigger_pgm_exception(env, PGM_PROTECTION, ilc);
 }
 
-static void trigger_page_fault(CPUState *env, target_ulong vaddr, uint32_t type,
+static void trigger_page_fault(CPUS390XState *env, target_ulong vaddr, uint32_t type,
                                uint64_t asc, int rw)
 {
     int ilc = ILC_LATER;
@@ -192,7 +166,7 @@ static void trigger_page_fault(CPUState *env, target_ulong vaddr, uint32_t type,
     trigger_pgm_exception(env, type, ilc);
 }
 
-static int mmu_translate_asce(CPUState *env, target_ulong vaddr, uint64_t asc,
+static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr, uint64_t asc,
                               uint64_t asce, int level, target_ulong *raddr,
                               int *flags, int rw)
 {
@@ -274,7 +248,7 @@ static int mmu_translate_asce(CPUState *env, target_ulong vaddr, uint64_t asc,
     return 0;
 }
 
-static int mmu_translate_asc(CPUState *env, target_ulong vaddr, uint64_t asc,
+static int mmu_translate_asc(CPUS390XState *env, target_ulong vaddr, uint64_t asc,
                              target_ulong *raddr, int *flags, int rw)
 {
     uint64_t asce = 0;
@@ -343,7 +317,7 @@ static int mmu_translate_asc(CPUState *env, target_ulong vaddr, uint64_t asc,
     return r;
 }
 
-int mmu_translate(CPUState *env, target_ulong vaddr, int rw, uint64_t asc,
+int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc,
                   target_ulong *raddr, int *flags)
 {
     int r = -1;
@@ -404,7 +378,7 @@ out:
     return r;
 }
 
-int cpu_s390x_handle_mmu_fault (CPUState *env, target_ulong _vaddr, int rw,
+int cpu_s390x_handle_mmu_fault (CPUS390XState *env, target_ulong _vaddr, int rw,
                                 int mmu_idx)
 {
     uint64_t asc = env->psw.mask & PSW_MASK_ASC;
@@ -444,7 +418,7 @@ int cpu_s390x_handle_mmu_fault (CPUState *env, target_ulong _vaddr, int rw,
     return 0;
 }
 
-target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong vaddr)
+target_phys_addr_t cpu_get_phys_page_debug(CPUS390XState *env, target_ulong vaddr)
 {
     target_ulong raddr;
     int prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
@@ -462,7 +436,7 @@ target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong vaddr)
     return raddr;
 }
 
-void load_psw(CPUState *env, uint64_t mask, uint64_t addr)
+void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr)
 {
     if (mask & PSW_MASK_WAIT) {
         if (!(mask & (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK))) {
@@ -481,7 +455,7 @@ void load_psw(CPUState *env, uint64_t mask, uint64_t addr)
     env->cc_op = (mask >> 13) & 3;
 }
 
-static uint64_t get_psw_mask(CPUState *env)
+static uint64_t get_psw_mask(CPUS390XState *env)
 {
     uint64_t r = env->psw.mask;
 
@@ -494,7 +468,7 @@ static uint64_t get_psw_mask(CPUState *env)
     return r;
 }
 
-static void do_svc_interrupt(CPUState *env)
+static void do_svc_interrupt(CPUS390XState *env)
 {
     uint64_t mask, addr;
     LowCore *lowcore;
@@ -514,7 +488,7 @@ static void do_svc_interrupt(CPUState *env)
     load_psw(env, mask, addr);
 }
 
-static void do_program_interrupt(CPUState *env)
+static void do_program_interrupt(CPUS390XState *env)
 {
     uint64_t mask, addr;
     LowCore *lowcore;
@@ -557,7 +531,7 @@ static void do_program_interrupt(CPUState *env)
 
 #define VIRTIO_SUBCODE_64 0x0D00
 
-static void do_ext_interrupt(CPUState *env)
+static void do_ext_interrupt(CPUS390XState *env)
 {
     uint64_t mask, addr;
     LowCore *lowcore;
@@ -597,7 +571,7 @@ static void do_ext_interrupt(CPUState *env)
     load_psw(env, mask, addr);
 }
 
-void do_interrupt (CPUState *env)
+void do_interrupt (CPUS390XState *env)
 {
     qemu_log("%s: %d at pc=%" PRIx64 "\n", __FUNCTION__, env->exception_index,
              env->psw.addr);