* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
- * License along with this library; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
#include <assert.h>
#include <stdlib.h>
-#include "exec.h"
+#include "cpu.h"
#include "helper.h"
#ifndef CONFIG_USER_ONLY
+#include "exec/softmmu_exec.h"
#define MMUSUFFIX _mmu
#define SHIFT 0
-#include "softmmu_template.h"
+#include "exec/softmmu_template.h"
#define SHIFT 1
-#include "softmmu_template.h"
+#include "exec/softmmu_template.h"
#define SHIFT 2
-#include "softmmu_template.h"
+#include "exec/softmmu_template.h"
#define SHIFT 3
-#include "softmmu_template.h"
+#include "exec/softmmu_template.h"
-void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
+void tlb_fill(CPUSH4State *env, target_ulong addr, int is_write, int mmu_idx,
+ uintptr_t retaddr)
{
- TranslationBlock *tb;
- CPUState *saved_env;
- unsigned long pc;
int ret;
- /* XXX: hack to restore env in all cases, even if not called from
- generated code */
- saved_env = env;
- env = cpu_single_env;
- ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
+ ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx);
if (ret) {
- if (retaddr) {
- /* now we have a real cpu fault */
- pc = (unsigned long) retaddr;
- tb = tb_find_pc(pc);
- if (tb) {
- /* the PC is inside the translated code. It means that we have
- a virtual CPU fault */
- cpu_restore_state(tb, env, pc, NULL);
- }
- }
- cpu_loop_exit();
+ /* now we have a real cpu fault */
+ if (retaddr) {
+ cpu_restore_state(env, retaddr);
+ }
+ cpu_loop_exit(env);
}
- env = saved_env;
}
#endif
-void helper_ldtlb(void)
+void helper_ldtlb(CPUSH4State *env)
{
#ifdef CONFIG_USER_ONLY
/* XXXXX */
- assert(0);
+ cpu_abort(env, "Unhandled ldtlb");
#else
cpu_load_tlb(env);
#endif
}
-void helper_raise_illegal_instruction(void)
+static inline void QEMU_NORETURN raise_exception(CPUSH4State *env, int index,
+ uintptr_t retaddr)
{
- env->exception_index = 0x180;
- cpu_loop_exit();
+ env->exception_index = index;
+ if (retaddr) {
+ cpu_restore_state(env, retaddr);
+ }
+ cpu_loop_exit(env);
}
-void helper_raise_slot_illegal_instruction(void)
+void helper_raise_illegal_instruction(CPUSH4State *env)
{
- env->exception_index = 0x1a0;
- cpu_loop_exit();
+ raise_exception(env, 0x180, 0);
}
-void helper_raise_fpu_disable(void)
+void helper_raise_slot_illegal_instruction(CPUSH4State *env)
{
- env->exception_index = 0x800;
- cpu_loop_exit();
+ raise_exception(env, 0x1a0, 0);
}
-void helper_raise_slot_fpu_disable(void)
+void helper_raise_fpu_disable(CPUSH4State *env)
{
- env->exception_index = 0x820;
- cpu_loop_exit();
+ raise_exception(env, 0x800, 0);
}
-void helper_debug(void)
+void helper_raise_slot_fpu_disable(CPUSH4State *env)
{
- env->exception_index = EXCP_DEBUG;
- cpu_loop_exit();
+ raise_exception(env, 0x820, 0);
}
-void helper_sleep(uint32_t next_pc)
+void helper_debug(CPUSH4State *env)
{
- env->halted = 1;
- env->exception_index = EXCP_HLT;
- env->pc = next_pc;
- cpu_loop_exit();
+ raise_exception(env, EXCP_DEBUG, 0);
}
-void helper_trapa(uint32_t tra)
+void helper_sleep(CPUSH4State *env)
+{
+ CPUState *cs = CPU(sh_env_get_cpu(env));
+
+ cs->halted = 1;
+ env->in_sleep = 1;
+ raise_exception(env, EXCP_HLT, 0);
+}
+
+void helper_trapa(CPUSH4State *env, uint32_t tra)
{
env->tra = tra << 2;
- env->exception_index = 0x160;
- cpu_loop_exit();
+ raise_exception(env, 0x160, 0);
}
-void helper_movcal(uint32_t address, uint32_t value)
+void helper_movcal(CPUSH4State *env, uint32_t address, uint32_t value)
{
if (cpu_sh4_is_cached (env, address))
{
}
}
-void helper_discard_movcal_backup(void)
+void helper_discard_movcal_backup(CPUSH4State *env)
{
memory_content *current = env->movcal_backup;
memory_content *next = current->next;
free (current);
env->movcal_backup = current = next;
- if (current == 0)
+ if (current == NULL)
env->movcal_backup_tail = &(env->movcal_backup);
}
}
-void helper_ocbi(uint32_t address)
+void helper_ocbi(CPUSH4State *env, uint32_t address)
{
memory_content **current = &(env->movcal_backup);
while (*current)
if ((a & ~0x1F) == (address & ~0x1F))
{
memory_content *next = (*current)->next;
- stl(a, (*current)->value);
+ cpu_stl_data(env, a, (*current)->value);
- if (next == 0)
+ if (next == NULL)
{
env->movcal_backup_tail = current;
}
}
}
-uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
-{
- uint32_t tmp0, tmp1;
-
- tmp1 = arg0 + arg1;
- tmp0 = arg1;
- arg1 = tmp1 + (env->sr & 1);
- if (tmp0 > tmp1)
- env->sr |= SR_T;
- else
- env->sr &= ~SR_T;
- if (tmp1 > arg1)
- env->sr |= SR_T;
- return arg1;
-}
-
-uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
-{
- uint32_t dest, src, ans;
-
- if ((int32_t) arg1 >= 0)
- dest = 0;
- else
- dest = 1;
- if ((int32_t) arg0 >= 0)
- src = 0;
- else
- src = 1;
- src += dest;
- arg1 += arg0;
- if ((int32_t) arg1 >= 0)
- ans = 0;
- else
- ans = 1;
- ans += dest;
- if (src == 0 || src == 2) {
- if (ans == 1)
- env->sr |= SR_T;
- else
- env->sr &= ~SR_T;
- } else
- env->sr &= ~SR_T;
- return arg1;
-}
-
#define T (env->sr & SR_T)
#define Q (env->sr & SR_Q ? 1 : 0)
#define M (env->sr & SR_M ? 1 : 0)
#define SETM env->sr |= SR_M
#define CLRM env->sr &= ~SR_M
-uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
+uint32_t helper_div1(CPUSH4State *env, uint32_t arg0, uint32_t arg1)
{
uint32_t tmp0, tmp2;
uint8_t old_q, tmp1 = 0xff;
return arg1;
}
-void helper_macl(uint32_t arg0, uint32_t arg1)
+void helper_macl(CPUSH4State *env, uint32_t arg0, uint32_t arg1)
{
int64_t res;
}
}
-void helper_macw(uint32_t arg0, uint32_t arg1)
+void helper_macw(CPUSH4State *env, uint32_t arg0, uint32_t arg1)
{
int64_t res;
}
}
-uint32_t helper_negc(uint32_t arg)
+static inline void set_t(CPUSH4State *env)
{
- uint32_t temp;
-
- temp = -arg;
- arg = temp - (env->sr & SR_T);
- if (0 < temp)
- env->sr |= SR_T;
- else
- env->sr &= ~SR_T;
- if (temp < arg)
- env->sr |= SR_T;
- return arg;
+ env->sr |= SR_T;
}
-uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
+static inline void clr_t(CPUSH4State *env)
{
- uint32_t tmp0, tmp1;
-
- tmp1 = arg1 - arg0;
- tmp0 = arg1;
- arg1 = tmp1 - (env->sr & SR_T);
- if (tmp0 < tmp1)
- env->sr |= SR_T;
- else
- env->sr &= ~SR_T;
- if (tmp1 < arg1)
- env->sr |= SR_T;
- return arg1;
+ env->sr &= ~SR_T;
}
-uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
+void helper_ld_fpscr(CPUSH4State *env, uint32_t val)
{
- int32_t dest, src, ans;
-
- if ((int32_t) arg1 >= 0)
- dest = 0;
- else
- dest = 1;
- if ((int32_t) arg0 >= 0)
- src = 0;
- else
- src = 1;
- src += dest;
- arg1 -= arg0;
- if ((int32_t) arg1 >= 0)
- ans = 0;
- else
- ans = 1;
- ans += dest;
- if (src == 1) {
- if (ans == 1)
- env->sr |= SR_T;
- else
- env->sr &= ~SR_T;
- } else
- env->sr &= ~SR_T;
- return arg1;
+ env->fpscr = val & FPSCR_MASK;
+ if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) {
+ set_float_rounding_mode(float_round_to_zero, &env->fp_status);
+ } else {
+ set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
+ }
+ set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status);
+}
+
+static void update_fpscr(CPUSH4State *env, uintptr_t retaddr)
+{
+ int xcpt, cause, enable;
+
+ xcpt = get_float_exception_flags(&env->fp_status);
+
+ /* Clear the flag entries */
+ env->fpscr &= ~FPSCR_FLAG_MASK;
+
+ if (unlikely(xcpt)) {
+ if (xcpt & float_flag_invalid) {
+ env->fpscr |= FPSCR_FLAG_V;
+ }
+ if (xcpt & float_flag_divbyzero) {
+ env->fpscr |= FPSCR_FLAG_Z;
+ }
+ if (xcpt & float_flag_overflow) {
+ env->fpscr |= FPSCR_FLAG_O;
+ }
+ if (xcpt & float_flag_underflow) {
+ env->fpscr |= FPSCR_FLAG_U;
+ }
+ if (xcpt & float_flag_inexact) {
+ env->fpscr |= FPSCR_FLAG_I;
+ }
+
+ /* Accumulate in cause entries */
+ env->fpscr |= (env->fpscr & FPSCR_FLAG_MASK)
+ << (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);
+
+ /* Generate an exception if enabled */
+ cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
+ enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT;
+ if (cause & enable) {
+ raise_exception(env, 0x120, retaddr);
+ }
+ }
}
-static inline void set_t(void)
+float32 helper_fabs_FT(float32 t0)
{
- env->sr |= SR_T;
+ return float32_abs(t0);
}
-static inline void clr_t(void)
+float64 helper_fabs_DT(float64 t0)
{
- env->sr &= ~SR_T;
+ return float64_abs(t0);
}
-void helper_ld_fpscr(uint32_t val)
+float32 helper_fadd_FT(CPUSH4State *env, float32 t0, float32 t1)
{
- env->fpscr = val & 0x003fffff;
- if (val & 0x01)
- set_float_rounding_mode(float_round_to_zero, &env->fp_status);
- else
- set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
+ set_float_exception_flags(0, &env->fp_status);
+ t0 = float32_add(t0, t1, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return t0;
}
-uint32_t helper_fabs_FT(uint32_t t0)
+float64 helper_fadd_DT(CPUSH4State *env, float64 t0, float64 t1)
{
- CPU_FloatU f;
- f.l = t0;
- f.f = float32_abs(f.f);
- return f.l;
+ set_float_exception_flags(0, &env->fp_status);
+ t0 = float64_add(t0, t1, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return t0;
}
-uint64_t helper_fabs_DT(uint64_t t0)
+void helper_fcmp_eq_FT(CPUSH4State *env, float32 t0, float32 t1)
{
- CPU_DoubleU d;
- d.ll = t0;
- d.d = float64_abs(d.d);
- return d.ll;
-}
+ int relation;
-uint32_t helper_fadd_FT(uint32_t t0, uint32_t t1)
-{
- CPU_FloatU f0, f1;
- f0.l = t0;
- f1.l = t1;
- f0.f = float32_add(f0.f, f1.f, &env->fp_status);
- return f0.l;
+ set_float_exception_flags(0, &env->fp_status);
+ relation = float32_compare(t0, t1, &env->fp_status);
+ if (unlikely(relation == float_relation_unordered)) {
+ update_fpscr(env, GETPC());
+ } else if (relation == float_relation_equal) {
+ set_t(env);
+ } else {
+ clr_t(env);
+ }
}
-uint64_t helper_fadd_DT(uint64_t t0, uint64_t t1)
+void helper_fcmp_eq_DT(CPUSH4State *env, float64 t0, float64 t1)
{
- CPU_DoubleU d0, d1;
- d0.ll = t0;
- d1.ll = t1;
- d0.d = float64_add(d0.d, d1.d, &env->fp_status);
- return d0.ll;
+ int relation;
+
+ set_float_exception_flags(0, &env->fp_status);
+ relation = float64_compare(t0, t1, &env->fp_status);
+ if (unlikely(relation == float_relation_unordered)) {
+ update_fpscr(env, GETPC());
+ } else if (relation == float_relation_equal) {
+ set_t(env);
+ } else {
+ clr_t(env);
+ }
}
-void helper_fcmp_eq_FT(uint32_t t0, uint32_t t1)
+void helper_fcmp_gt_FT(CPUSH4State *env, float32 t0, float32 t1)
{
- CPU_FloatU f0, f1;
- f0.l = t0;
- f1.l = t1;
+ int relation;
- if (float32_compare(f0.f, f1.f, &env->fp_status) == 0)
- set_t();
- else
- clr_t();
+ set_float_exception_flags(0, &env->fp_status);
+ relation = float32_compare(t0, t1, &env->fp_status);
+ if (unlikely(relation == float_relation_unordered)) {
+ update_fpscr(env, GETPC());
+ } else if (relation == float_relation_greater) {
+ set_t(env);
+ } else {
+ clr_t(env);
+ }
}
-void helper_fcmp_eq_DT(uint64_t t0, uint64_t t1)
+void helper_fcmp_gt_DT(CPUSH4State *env, float64 t0, float64 t1)
{
- CPU_DoubleU d0, d1;
- d0.ll = t0;
- d1.ll = t1;
+ int relation;
- if (float64_compare(d0.d, d1.d, &env->fp_status) == 0)
- set_t();
- else
- clr_t();
+ set_float_exception_flags(0, &env->fp_status);
+ relation = float64_compare(t0, t1, &env->fp_status);
+ if (unlikely(relation == float_relation_unordered)) {
+ update_fpscr(env, GETPC());
+ } else if (relation == float_relation_greater) {
+ set_t(env);
+ } else {
+ clr_t(env);
+ }
}
-void helper_fcmp_gt_FT(uint32_t t0, uint32_t t1)
+float64 helper_fcnvsd_FT_DT(CPUSH4State *env, float32 t0)
{
- CPU_FloatU f0, f1;
- f0.l = t0;
- f1.l = t1;
-
- if (float32_compare(f0.f, f1.f, &env->fp_status) == 1)
- set_t();
- else
- clr_t();
+ float64 ret;
+ set_float_exception_flags(0, &env->fp_status);
+ ret = float32_to_float64(t0, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return ret;
}
-void helper_fcmp_gt_DT(uint64_t t0, uint64_t t1)
+float32 helper_fcnvds_DT_FT(CPUSH4State *env, float64 t0)
{
- CPU_DoubleU d0, d1;
- d0.ll = t0;
- d1.ll = t1;
-
- if (float64_compare(d0.d, d1.d, &env->fp_status) == 1)
- set_t();
- else
- clr_t();
+ float32 ret;
+ set_float_exception_flags(0, &env->fp_status);
+ ret = float64_to_float32(t0, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return ret;
}
-uint64_t helper_fcnvsd_FT_DT(uint32_t t0)
+float32 helper_fdiv_FT(CPUSH4State *env, float32 t0, float32 t1)
{
- CPU_DoubleU d;
- CPU_FloatU f;
- f.l = t0;
- d.d = float32_to_float64(f.f, &env->fp_status);
- return d.ll;
+ set_float_exception_flags(0, &env->fp_status);
+ t0 = float32_div(t0, t1, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return t0;
}
-uint32_t helper_fcnvds_DT_FT(uint64_t t0)
+float64 helper_fdiv_DT(CPUSH4State *env, float64 t0, float64 t1)
{
- CPU_DoubleU d;
- CPU_FloatU f;
- d.ll = t0;
- f.f = float64_to_float32(d.d, &env->fp_status);
- return f.l;
+ set_float_exception_flags(0, &env->fp_status);
+ t0 = float64_div(t0, t1, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return t0;
}
-uint32_t helper_fdiv_FT(uint32_t t0, uint32_t t1)
+float32 helper_float_FT(CPUSH4State *env, uint32_t t0)
{
- CPU_FloatU f0, f1;
- f0.l = t0;
- f1.l = t1;
- f0.f = float32_div(f0.f, f1.f, &env->fp_status);
- return f0.l;
+ float32 ret;
+ set_float_exception_flags(0, &env->fp_status);
+ ret = int32_to_float32(t0, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return ret;
}
-uint64_t helper_fdiv_DT(uint64_t t0, uint64_t t1)
+float64 helper_float_DT(CPUSH4State *env, uint32_t t0)
{
- CPU_DoubleU d0, d1;
- d0.ll = t0;
- d1.ll = t1;
- d0.d = float64_div(d0.d, d1.d, &env->fp_status);
- return d0.ll;
+ float64 ret;
+ set_float_exception_flags(0, &env->fp_status);
+ ret = int32_to_float64(t0, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return ret;
}
-uint32_t helper_float_FT(uint32_t t0)
+float32 helper_fmac_FT(CPUSH4State *env, float32 t0, float32 t1, float32 t2)
{
- CPU_FloatU f;
- f.f = int32_to_float32(t0, &env->fp_status);
- return f.l;
+ set_float_exception_flags(0, &env->fp_status);
+ t0 = float32_muladd(t0, t1, t2, 0, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return t0;
}
-uint64_t helper_float_DT(uint32_t t0)
+float32 helper_fmul_FT(CPUSH4State *env, float32 t0, float32 t1)
{
- CPU_DoubleU d;
- d.d = int32_to_float64(t0, &env->fp_status);
- return d.ll;
+ set_float_exception_flags(0, &env->fp_status);
+ t0 = float32_mul(t0, t1, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return t0;
}
-uint32_t helper_fmac_FT(uint32_t t0, uint32_t t1, uint32_t t2)
+float64 helper_fmul_DT(CPUSH4State *env, float64 t0, float64 t1)
{
- CPU_FloatU f0, f1, f2;
- f0.l = t0;
- f1.l = t1;
- f2.l = t2;
- f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
- f0.f = float32_add(f0.f, f2.f, &env->fp_status);
- return f0.l;
+ set_float_exception_flags(0, &env->fp_status);
+ t0 = float64_mul(t0, t1, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return t0;
}
-uint32_t helper_fmul_FT(uint32_t t0, uint32_t t1)
+float32 helper_fneg_T(float32 t0)
{
- CPU_FloatU f0, f1;
- f0.l = t0;
- f1.l = t1;
- f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
- return f0.l;
+ return float32_chs(t0);
}
-uint64_t helper_fmul_DT(uint64_t t0, uint64_t t1)
+float32 helper_fsqrt_FT(CPUSH4State *env, float32 t0)
{
- CPU_DoubleU d0, d1;
- d0.ll = t0;
- d1.ll = t1;
- d0.d = float64_mul(d0.d, d1.d, &env->fp_status);
- return d0.ll;
+ set_float_exception_flags(0, &env->fp_status);
+ t0 = float32_sqrt(t0, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return t0;
}
-uint32_t helper_fneg_T(uint32_t t0)
+float64 helper_fsqrt_DT(CPUSH4State *env, float64 t0)
{
- CPU_FloatU f;
- f.l = t0;
- f.f = float32_chs(f.f);
- return f.l;
+ set_float_exception_flags(0, &env->fp_status);
+ t0 = float64_sqrt(t0, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return t0;
}
-uint32_t helper_fsqrt_FT(uint32_t t0)
+float32 helper_fsub_FT(CPUSH4State *env, float32 t0, float32 t1)
{
- CPU_FloatU f;
- f.l = t0;
- f.f = float32_sqrt(f.f, &env->fp_status);
- return f.l;
+ set_float_exception_flags(0, &env->fp_status);
+ t0 = float32_sub(t0, t1, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return t0;
}
-uint64_t helper_fsqrt_DT(uint64_t t0)
+float64 helper_fsub_DT(CPUSH4State *env, float64 t0, float64 t1)
{
- CPU_DoubleU d;
- d.ll = t0;
- d.d = float64_sqrt(d.d, &env->fp_status);
- return d.ll;
+ set_float_exception_flags(0, &env->fp_status);
+ t0 = float64_sub(t0, t1, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return t0;
}
-uint32_t helper_fsub_FT(uint32_t t0, uint32_t t1)
+uint32_t helper_ftrc_FT(CPUSH4State *env, float32 t0)
{
- CPU_FloatU f0, f1;
- f0.l = t0;
- f1.l = t1;
- f0.f = float32_sub(f0.f, f1.f, &env->fp_status);
- return f0.l;
+ uint32_t ret;
+ set_float_exception_flags(0, &env->fp_status);
+ ret = float32_to_int32_round_to_zero(t0, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return ret;
}
-uint64_t helper_fsub_DT(uint64_t t0, uint64_t t1)
+uint32_t helper_ftrc_DT(CPUSH4State *env, float64 t0)
{
- CPU_DoubleU d0, d1;
- d0.ll = t0;
- d1.ll = t1;
- d0.d = float64_sub(d0.d, d1.d, &env->fp_status);
- return d0.ll;
+ uint32_t ret;
+ set_float_exception_flags(0, &env->fp_status);
+ ret = float64_to_int32_round_to_zero(t0, &env->fp_status);
+ update_fpscr(env, GETPC());
+ return ret;
}
-uint32_t helper_ftrc_FT(uint32_t t0)
+void helper_fipr(CPUSH4State *env, uint32_t m, uint32_t n)
{
- CPU_FloatU f;
- f.l = t0;
- return float32_to_int32_round_to_zero(f.f, &env->fp_status);
+ int bank, i;
+ float32 r, p;
+
+ bank = (env->sr & FPSCR_FR) ? 16 : 0;
+ r = float32_zero;
+ set_float_exception_flags(0, &env->fp_status);
+
+ for (i = 0 ; i < 4 ; i++) {
+ p = float32_mul(env->fregs[bank + m + i],
+ env->fregs[bank + n + i],
+ &env->fp_status);
+ r = float32_add(r, p, &env->fp_status);
+ }
+ update_fpscr(env, GETPC());
+
+ env->fregs[bank + n + 3] = r;
}
-uint32_t helper_ftrc_DT(uint64_t t0)
+void helper_ftrv(CPUSH4State *env, uint32_t n)
{
- CPU_DoubleU d;
- d.ll = t0;
- return float64_to_int32_round_to_zero(d.d, &env->fp_status);
+ int bank_matrix, bank_vector;
+ int i, j;
+ float32 r[4];
+ float32 p;
+
+ bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
+ bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
+ set_float_exception_flags(0, &env->fp_status);
+ for (i = 0 ; i < 4 ; i++) {
+ r[i] = float32_zero;
+ for (j = 0 ; j < 4 ; j++) {
+ p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
+ env->fregs[bank_vector + j],
+ &env->fp_status);
+ r[i] = float32_add(r[i], p, &env->fp_status);
+ }
+ }
+ update_fpscr(env, GETPC());
+
+ for (i = 0 ; i < 4 ; i++) {
+ env->fregs[bank_vector + i] = r[i];
+ }
}
projects / qemu.git / blobdiff