target-openrisc: Correct wrong epcr register in interrupt handler

[qemu.git] / target-sparc / int32_helper.c

diff --git a/target-sparc/int32_helper.c b/target-sparc/int32_helper.c
index 507c355cac6130f6301ed5cf4064b2c55af04f8d..d5322380cd4a3ff171ea18c609570e4d1c645fa3 100644 (file)
--- a/target-sparc/int32_helper.c
+++ b/target-sparc/int32_helper.c
@@ -19,7 +19,7 @@
 
 #include "cpu.h"
 #include "trace.h"
-#include "sysemu.h"
+#include "sysemu/sysemu.h"
 
 #define DEBUG_PCALL
 
@@ -58,8 +58,10 @@ static const char * const excp_names[0x80] = {
 };
 #endif
 
-void do_interrupt(CPUSPARCState *env)
+void sparc_cpu_do_interrupt(CPUState *cs)
 {
+    SPARCCPU *cpu = SPARC_CPU(cs);
+    CPUSPARCState *env = &cpu->env;
     int cwp, intno = env->exception_index;
 
     /* Compute PSR before exposing state.  */
@@ -84,7 +86,7 @@ void do_interrupt(CPUSPARCState *env)
         }
 
         qemu_log("%6d: %s (v=%02x)\n", count, name, intno);
-        log_cpu_state(env, 0);
+        log_cpu_state(cs, 0);
 #if 0
         {
             int i;