hw/i386/Makefile.obj: use $(PYTHON) to run .py scripts consistently

[qemu.git] / target-sparc / int64_helper.c

diff --git a/target-sparc/int64_helper.c b/target-sparc/int64_helper.c
index c9c5e0e8565050bd8f32796453595e55ee83a4a6..bf7dd86ab8264a8877b8a59e81fb2d179bf26a3f 100644 (file)
--- a/target-sparc/int64_helper.c
+++ b/target-sparc/int64_helper.c
@@ -19,16 +19,9 @@
 
 #include "cpu.h"
 #include "helper.h"
+#include "trace.h"
 
-//#define DEBUG_PCALL
-//#define DEBUG_PSTATE
-
-#ifdef DEBUG_PSTATE
-#define DPRINTF_PSTATE(fmt, ...)                                \
-    do { printf("PSTATE: " fmt , ## __VA_ARGS__); } while (0)
-#else
-#define DPRINTF_PSTATE(fmt, ...) do {} while (0)
-#endif
+#define DEBUG_PCALL
 
 #ifdef DEBUG_PCALL
 static const char * const excp_names[0x80] = {
@@ -66,11 +59,18 @@ static const char * const excp_names[0x80] = {
 };
 #endif
 
-void do_interrupt(CPUState *env)
+void sparc_cpu_do_interrupt(CPUState *cs)
 {
+    SPARCCPU *cpu = SPARC_CPU(cs);
+    CPUSPARCState *env = &cpu->env;
     int intno = env->exception_index;
     trap_state *tsptr;
 
+    /* Compute PSR before exposing state.  */
+    if (env->cc_op != CC_OP_FLAGS) {
+        cpu_get_psr(env);
+    }
+
 #ifdef DEBUG_PCALL
     if (qemu_loglevel_mask(CPU_LOG_INT)) {
         static int count;
@@ -91,12 +91,8 @@ void do_interrupt(CPUState *env)
             }
         }
 
-        qemu_log("%6d: %s (v=%04x) pc=%016" PRIx64 " npc=%016" PRIx64
-                " SP=%016" PRIx64 "\n",
-                count, name, intno,
-                env->pc,
-                env->npc, env->regwptr[6]);
-        log_cpu_state(env, 0);
+        qemu_log("%6d: %s (v=%04x)\n", count, name, intno);
+        log_cpu_state(cs, 0);
 #if 0
         {
             int i;
@@ -167,38 +163,42 @@ void do_interrupt(CPUState *env)
     env->exception_index = -1;
 }
 
-trap_state *cpu_tsptr(CPUState* env)
+trap_state *cpu_tsptr(CPUSPARCState* env)
 {
     return &env->ts[env->tl & MAXTL_MASK];
 }
 
-static void do_modify_softint(CPUState *env, const char *operation,
-                              uint32_t value)
+static bool do_modify_softint(CPUSPARCState *env, uint32_t value)
 {
     if (env->softint != value) {
         env->softint = value;
-        DPRINTF_PSTATE(": %s new %08x\n", operation, env->softint);
 #if !defined(CONFIG_USER_ONLY)
         if (cpu_interrupts_enabled(env)) {
             cpu_check_irqs(env);
         }
 #endif
+        return true;
     }
+    return false;
 }
 
-void helper_set_softint(CPUState *env, uint64_t value)
+void helper_set_softint(CPUSPARCState *env, uint64_t value)
 {
-    do_modify_softint(env, "helper_set_softint",
-                      env->softint | (uint32_t)value);
+    if (do_modify_softint(env, env->softint | (uint32_t)value)) {
+        trace_int_helper_set_softint(env->softint);
+    }
 }
 
-void helper_clear_softint(CPUState *env, uint64_t value)
+void helper_clear_softint(CPUSPARCState *env, uint64_t value)
 {
-    do_modify_softint(env, "helper_clear_softint",
-                      env->softint & (uint32_t)~value);
+    if (do_modify_softint(env, env->softint & (uint32_t)~value)) {
+        trace_int_helper_clear_softint(env->softint);
+    }
 }
 
-void helper_write_softint(CPUState *env, uint64_t value)
+void helper_write_softint(CPUSPARCState *env, uint64_t value)
 {
-    do_modify_softint(env, "helper_write_softint", (uint32_t)value);
+    if (do_modify_softint(env, (uint32_t)value)) {
+        trace_int_helper_write_softint(env->softint);
+    }
 }