target-xtensa: flush TLB page for new MMU mapping

[qemu.git] / target-xtensa / op_helper.c

diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index 364dc19bc06ee4fb140f25bd914f023ff4b96ce4..ce61157c919c72200d555a896eac838ef787bb6e 100644 (file)
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -669,6 +669,7 @@ void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb,
             entry->paddr = pte & xtensa_tlb_get_addr_mask(env, dtlb, wi);
             entry->asid = (env->sregs[RASID] >> ((pte >> 1) & 0x18)) & 0xff;
             entry->attr = pte & 0xf;
+            tlb_flush_page(env, entry->vaddr);
         } else {
             qemu_log("%s %d, %d, %d trying to set immutable entry\n",
                     __func__, dtlb, wi, ei);