Merge git://github.com/hw-claudio/qemu-aarch64-queue into tcg-next

[qemu.git] / tcg / ppc / tcg-target.c

diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
index 34a0693c5887c96bde40427568287ea43dd75849..453ab6b580954ccde713dfdd620b249dc036fb89 100644 (file)
--- a/tcg/ppc/tcg-target.c
+++ b/tcg/ppc/tcg-target.c
@@ -549,7 +549,7 @@ static void add_qemu_ldst_label (TCGContext *s,
     label->label_ptr[0] = label_ptr;
 }
 
-#include "../../softmmu_defs.h"
+#include "exec/softmmu_defs.h"
 
 /* helper signature: helper_ld_mmu(CPUState *env, target_ulong addr,
    int mmu_idx) */
@@ -628,9 +628,9 @@ static void tcg_out_tlb_check (TCGContext *s, int r0, int r1, int r2,
 
 static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
 {
-    int addr_reg, addr_reg2, data_reg, data_reg2, r0, r1, rbase, bswap;
+    int addr_reg, data_reg, data_reg2, r0, r1, rbase, bswap;
 #ifdef CONFIG_SOFTMMU
-    int mem_index, s_bits, r2;
+    int mem_index, s_bits, r2, addr_reg2;
     uint8_t *label_ptr;
 #endif
 
@@ -741,9 +741,9 @@ static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
 
 static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
 {
-    int addr_reg, addr_reg2, r0, r1, data_reg, data_reg2, bswap, rbase;
+    int addr_reg, r0, r1, data_reg, data_reg2, bswap, rbase;
 #ifdef CONFIG_SOFTMMU
-    int mem_index, r2;
+    int mem_index, r2, addr_reg2;
     uint8_t *label_ptr;
 #endif
 
@@ -901,7 +901,6 @@ static void tcg_out_qemu_ld_slow_path (TCGContext *s, TCGLabelQemuLdst *label)
 
 static void tcg_out_qemu_st_slow_path (TCGContext *s, TCGLabelQemuLdst *label)
 {
-    int s_bits;
     int ir;
     int opc = label->opc;
     int mem_index = label->mem_index;
@@ -911,8 +910,6 @@ static void tcg_out_qemu_st_slow_path (TCGContext *s, TCGLabelQemuLdst *label)
     uint8_t *raddr = label->raddr;
     uint8_t **label_ptr = &label->label_ptr[0];
 
-    s_bits = opc & 3;
-
     /* resolve label address */
     reloc_pc14 (label_ptr[0], (tcg_target_long) s->code_ptr);
 
@@ -982,6 +979,7 @@ void tcg_out_tb_finalize(TCGContext *s)
 }
 #endif
 
+#ifdef CONFIG_SOFTMMU
 static void emit_ldst_trampoline (TCGContext *s, const void *ptr)
 {
     tcg_out32 (s, MFSPR | RT (3) | LR);
@@ -990,6 +988,7 @@ static void emit_ldst_trampoline (TCGContext *s, const void *ptr)
     tcg_out_mov (s, TCG_TYPE_I32, 3, TCG_AREG0);
     tcg_out_b (s, 0, (tcg_target_long) ptr);
 }
+#endif
 
 static void tcg_target_qemu_prologue (TCGContext *s)
 {
@@ -1052,6 +1051,7 @@ static void tcg_target_qemu_prologue (TCGContext *s)
     tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size);
     tcg_out32 (s, BCLR | BO_ALWAYS);
 
+#ifdef CONFIG_SOFTMMU
     for (i = 0; i < 4; ++i) {
         ld_trampolines[i] = s->code_ptr;
         emit_ldst_trampoline (s, qemu_ld_helpers[i]);
@@ -1059,6 +1059,7 @@ static void tcg_target_qemu_prologue (TCGContext *s)
         st_trampolines[i] = s->code_ptr;
         emit_ldst_trampoline (s, qemu_st_helpers[i]);
     }
+#endif
 }
 
 static void tcg_out_ld (TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
@@ -1670,18 +1671,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
         tcg_out32 (s, DIVWU | TAB (args[0], args[1], args[2]));
         break;
 
-    case INDEX_op_rem_i32:
-        tcg_out32 (s, DIVW | TAB (0, args[1], args[2]));
-        tcg_out32 (s, MULLW | TAB (0, 0, args[2]));
-        tcg_out32 (s, SUBF | TAB (args[0], 0, args[1]));
-        break;
-
-    case INDEX_op_remu_i32:
-        tcg_out32 (s, DIVWU | TAB (0, args[1], args[2]));
-        tcg_out32 (s, MULLW | TAB (0, 0, args[2]));
-        tcg_out32 (s, SUBF | TAB (args[0], 0, args[1]));
-        break;
-
     case INDEX_op_mulu2_i32:
         if (args[0] == args[2] || args[0] == args[3]) {
             tcg_out32 (s, MULLW | TAB (0, args[2], args[3]));
@@ -1991,8 +1980,6 @@ static const TCGTargetOpDef ppc_op_defs[] = {
     { INDEX_op_mul_i32, { "r", "r", "ri" } },
     { INDEX_op_div_i32, { "r", "r", "r" } },
     { INDEX_op_divu_i32, { "r", "r", "r" } },
-    { INDEX_op_rem_i32, { "r", "r", "r" } },
-    { INDEX_op_remu_i32, { "r", "r", "r" } },
     { INDEX_op_mulu2_i32, { "r", "r", "r", "r" } },
     { INDEX_op_sub_i32, { "r", "r", "ri" } },
     { INDEX_op_and_i32, { "r", "r", "ri" } },