}
#endif
+static inline void cpu_to_le16w(uint16_t *p, uint16_t v)
+{
+ *p = cpu_to_le16(v);
+}
-/* vl.c */
-extern int reset_requested;
+static inline void cpu_to_le32w(uint32_t *p, uint32_t v)
+{
+ *p = cpu_to_le32(v);
+}
+static inline uint16_t le16_to_cpup(const uint16_t *p)
+{
+ return le16_to_cpu(*p);
+}
+
+static inline uint32_t le32_to_cpup(const uint32_t *p)
+{
+ return le32_to_cpu(*p);
+}
+
+/* unaligned versions (optimized for frequent unaligned accesses)*/
+
+#if defined(__i386__) || defined(__powerpc__)
+
+#define cpu_to_le16wu(p, v) cpu_to_le16w(p, v)
+#define cpu_to_le32wu(p, v) cpu_to_le32w(p, v)
+#define le16_to_cpupu(p) le16_to_cpup(p)
+#define le32_to_cpupu(p) le32_to_cpup(p)
+
+#else
+
+static inline void cpu_to_le16wu(uint16_t *p, uint16_t v)
+{
+ uint8_t *p1 = (uint8_t *)p;
+
+ p1[0] = v;
+ p1[1] = v >> 8;
+}
+
+static inline void cpu_to_le32wu(uint32_t *p, uint32_t v)
+{
+ uint8_t *p1 = (uint8_t *)p;
+
+ p1[0] = v;
+ p1[1] = v >> 8;
+ p1[2] = v >> 16;
+ p1[3] = v >> 24;
+}
+
+static inline uint16_t le16_to_cpupu(const uint16_t *p)
+{
+ const uint8_t *p1 = (const uint8_t *)p;
+ return p1[0] | (p1[1] << 8);
+}
+
+static inline uint32_t le32_to_cpupu(const uint32_t *p)
+{
+ const uint8_t *p1 = (const uint8_t *)p;
+ return p1[0] | (p1[1] << 8) | (p1[2] << 16) | (p1[3] << 24);
+}
+
+#endif
+
+/* vl.c */
uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
void hw_error(const char *fmt, ...);
+int get_image_size(const char *filename);
int load_image(const char *filename, uint8_t *addr);
extern const char *bios_dir;
void vm_start(void);
void vm_stop(int reason);
+typedef void QEMUResetHandler(void *opaque);
+
+void qemu_register_reset(QEMUResetHandler *func, void *opaque);
+void qemu_system_reset_request(void);
+void qemu_system_shutdown_request(void);
+
extern int audio_enabled;
extern int ram_size;
extern int bios_size;
extern int rtc_utc;
+extern int cirrus_vga_enabled;
+extern int graphic_width;
+extern int graphic_height;
+extern int graphic_depth;
/* XXX: make it dynamic */
#if defined (TARGET_PPC)
#define BIOS_SIZE (512 * 1024)
#else
-#define BIOS_SIZE 0
+#define BIOS_SIZE ((256 + 64) * 1024)
#endif
+/* keyboard/mouse support */
+
+#define MOUSE_EVENT_LBUTTON 0x01
+#define MOUSE_EVENT_RBUTTON 0x02
+#define MOUSE_EVENT_MBUTTON 0x04
+
+typedef void QEMUPutKBDEvent(void *opaque, int keycode);
+typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
+
+void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
+void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque);
+
+void kbd_put_keycode(int keycode);
+void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
+
/* async I/O support */
typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
extern target_phys_addr_t pci_mem_base;
+typedef struct PCIBus PCIBus;
typedef struct PCIDevice PCIDevice;
typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
uint8_t config[256];
/* the following fields are read only */
- int bus_num;
+ PCIBus *bus;
int devfn;
char name[64];
PCIIORegion io_regions[PCI_NUM_REGIONS];
int irq_index;
};
-PCIDevice *pci_register_device(const char *name, int instance_size,
- int bus_num, int devfn,
+PCIDevice *pci_register_device(PCIBus *bus, const char *name,
+ int instance_size, int devfn,
PCIConfigReadFunc *config_read,
PCIConfigWriteFunc *config_write);
extern struct PIIX3State *piix3_state;
-void i440fx_init(void);
-void piix3_init(void);
+PCIBus *i440fx_init(void);
+void piix3_init(PCIBus *bus);
void pci_bios_init(void);
void pci_info(void);
/* temporary: will be moved in platform specific file */
-void pci_prep_init(void);
-void pci_pmac_init(void);
-void pci_ppc_bios_init(void);
+PCIBus *pci_prep_init(void);
+struct openpic_t;
+void pci_pmac_set_openpic(PCIBus *bus, struct openpic_t *openpic);
+PCIBus *pci_pmac_init(void);
+
+/* openpic.c */
+typedef struct openpic_t openpic_t;
+void openpic_set_irq (openpic_t *opp, int n_IRQ, int level);
+openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus);
/* vga.c */
s->dpy_resize(s, w, h);
}
-int vga_initialize(DisplayState *ds, uint8_t *vga_ram_base,
- unsigned long vga_ram_offset, int vga_ram_size,
- int is_pci);
+int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+ unsigned long vga_ram_offset, int vga_ram_size);
void vga_update_display(void);
+void vga_invalidate_display(void);
void vga_screen_dump(const char *filename);
+/* cirrus_vga.c */
+void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
+ unsigned long vga_ram_offset, int vga_ram_size);
+void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
+ unsigned long vga_ram_offset, int vga_ram_size);
+
/* sdl.c */
void sdl_display_init(DisplayState *ds);
void isa_ide_init(int iobase, int iobase2, int irq,
BlockDriverState *hd0, BlockDriverState *hd1);
-void pci_ide_init(BlockDriverState **hd_table);
-void pci_piix3_ide_init(BlockDriverState **hd_table);
+void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table);
+void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table);
+int pmac_ide_init (BlockDriverState **hd_table,
+ openpic_t *openpic, int irq);
/* oss.c */
typedef enum {
void DMA_release_DREQ (int nchan);
void DMA_schedule(int nchan);
void DMA_run (void);
-void DMA_init (void);
+void DMA_init (int high_page_enable);
void DMA_register_channel (int nchan,
DMA_transfer_handler transfer_handler, void *opaque);
/* ne2000.c */
void isa_ne2000_init(int base, int irq, NetDriverState *nd);
-void pci_ne2000_init(NetDriverState *nd);
+void pci_ne2000_init(PCIBus *bus, NetDriverState *nd);
/* pckbd.c */
-void kbd_put_keycode(int keycode);
-
-#define MOUSE_EVENT_LBUTTON 0x01
-#define MOUSE_EVENT_RBUTTON 0x02
-#define MOUSE_EVENT_MBUTTON 0x04
-void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
-
void kbd_init(void);
/* mc146818rtc.c */
const unsigned char *arch,
uint32_t RAM_size, int boot_device,
uint32_t kernel_image, uint32_t kernel_size,
- uint32_t cmdline, uint32_t cmdline_size,
+ const char *cmdline,
uint32_t initrd_image, uint32_t initrd_size,
- uint32_t NVRAM_image);
+ uint32_t NVRAM_image,
+ int width, int height, int depth);
+
+/* adb.c */
+
+#define MAX_ADB_DEVICES 16
+
+#define ADB_MAX_OUT_LEN 16
+
+typedef struct ADBDevice ADBDevice;
+
+/* buf = NULL means polling */
+typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
+ const uint8_t *buf, int len);
+struct ADBDevice {
+ struct ADBBusState *bus;
+ int devaddr;
+ int handler;
+ ADBDeviceRequest *devreq;
+ void *opaque;
+};
+
+typedef struct ADBBusState {
+ ADBDevice devices[MAX_ADB_DEVICES];
+ int nb_devices;
+ int poll_index;
+} ADBBusState;
+
+int adb_request(ADBBusState *s, uint8_t *buf_out,
+ const uint8_t *buf, int len);
+int adb_poll(ADBBusState *s, uint8_t *buf_out);
+
+ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
+ ADBDeviceRequest *devreq,
+ void *opaque);
+void adb_kbd_init(ADBBusState *bus);
+void adb_mouse_init(ADBBusState *bus);
+
+/* cuda.c */
+
+extern ADBBusState adb_bus;
+int cuda_init(openpic_t *openpic, int irq);
/* monitor.c */
void monitor_init(void);
projects / qemu.git / blobdiff