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target/loongarch: Add LoongArch interrupt and exception handle
authorXiaojuan Yang <yangxiaojuan@loongson.cn>
Mon, 6 Jun 2022 12:43:13 +0000 (20:43 +0800)
committerRichard Henderson <richard.henderson@linaro.org>
Mon, 6 Jun 2022 18:09:03 +0000 (18:09 +0000)
commitf757a2cd6948344b8303e375f6f9d72887abf1f4
tree676655301edf8157b8b5df50256be8bee2274b84tree
parent7e1c521e2a108a4ffceecd8bec846625c956c8f8commit | diff
target/loongarch: Add LoongArch interrupt and exception handle

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-24-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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target/loongarch/cpu.h diff | blob | blame | history
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