The implementation is already aligned to spec.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19180
6f19259b-4bc3-4df7-8a09-
765794883524
// /**\r
//\r
// (C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.<BR>\r
// /**\r
//\r
// (C) Copyright 2013-2015 Hewlett-Packard Development Company, L.P.<BR>\r
-// Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>\r
+// Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
// This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution. The full text of the license may be found at\r
"Displays or modifies MEM/MMIO/IO/PCI/PCIE address space.\r\n"\r
".SH SYNOPSIS\r\n"\r
" \r\n"\r
"Displays or modifies MEM/MMIO/IO/PCI/PCIE address space.\r\n"\r
".SH SYNOPSIS\r\n"\r
" \r\n"\r
-"MM Address [Value] [-w 1|2|4|8] [-MEM | -MMIO [[Seg] Bus] | -IO [[Seg] Bus] |\r\n"\r
-" -PCI | -PCIE] [-n]\r\n"\r
+"MM Address [Value] [-w 1|2|4|8] [-MEM | -MMIO | -IO | -PCI | -PCIE] [-n]\r\n"\r
".SH OPTIONS\r\n"\r
" \r\n"\r
".SH OPTIONS\r\n"\r
" \r\n"\r
+" Address - Specifies a starting address.\r\n"\r
+" Value - Specifies the value to write.\r\n"\r
" -MEM - Memory Address type\r\n"\r
" -MMIO - Memory Mapped IO Address type\r\n"\r
" -IO - IO Address type\r\n"\r
" -MEM - Memory Address type\r\n"\r
" -MMIO - Memory Mapped IO Address type\r\n"\r
" -IO - IO Address type\r\n"\r
" 4 - 4 bytes\r\n"\r
" 8 - 8 bytes\r\n"\r
" -n - Non-interactive mode\r\n"\r
" 4 - 4 bytes\r\n"\r
" 8 - 8 bytes\r\n"\r
" -n - Non-interactive mode\r\n"\r
-" Address - Specifies a starting address.\r\n"\r
-" Value - Specifies the value to write.\r\n"\r
-" Seg - Specifies the segment number of the PCI root bridge for -MMIO and -IO address types.\r\n"\r
-" Bus - Specifies the bus number of the PCI root bridge for -MMIO and -IO address types.\r\n"\r
".SH DESCRIPTION\r\n"\r
" \r\n"\r
"NOTES:\r\n"\r
".SH DESCRIPTION\r\n"\r
" \r\n"\r
"NOTES:\r\n"\r
" specified width.\r\n"\r
" 10. Not all addresses are safe to access. Access to any improper address\r\n"\r
" can bring unexpected results.\r\n"\r
" specified width.\r\n"\r
" 10. Not all addresses are safe to access. Access to any improper address\r\n"\r
" can bring unexpected results.\r\n"\r
-" 11. If no Bus or Segment is specified, the first root bridge found is used.\r\n"\r
-" 12. If only one parameter is specified after -MMIO or -IO, the Bus parameter is assumed\r\n"\r
-" and Segment defaults to 0.\r\n"\r
".SH EXAMPLES\r\n"\r
" \r\n"\r
"EXAMPLES:\r\n"\r
".SH EXAMPLES\r\n"\r
" \r\n"\r
"EXAMPLES:\r\n"\r