- PalCall (29, 0, 0, 0);\r
+ UINT64 Tpr;\r
+\r
+ //\r
+ // It is the TPR register that controls if external interrupt would bring processor in LIGHT HALT low-power state\r
+ // back to normal state. PAL_HALT_LIGHT does not depend on PSR setting.\r
+ // So here if interrupts are disabled (via PSR.i), TRP.mmi needs to be set to prevent processor being interrupted by external interrupts.\r
+ // If interrupts are enabled, then just use current TRP setting.\r
+ //\r
+ if (GetInterruptState ()) {\r
+ //\r
+ // If interrupts are enabled, then call PAL_HALT_LIGHT with the current TPR setting.\r
+ //\r
+ PalCall (PAL_HALT_LIGHT, 0, 0, 0);\r
+ } else {\r
+ //\r
+ // If interrupts are disabled on entry, then mask all interrupts in TPR before calling PAL_HALT_LIGHT.\r
+ //\r
+\r
+ //\r
+ // Save TPR\r
+ //\r
+ Tpr = AsmReadTpr();\r
+ //\r
+ // Set TPR.mmi to mask all external interrupts\r
+ //\r
+ AsmWriteTpr (BIT16 | Tpr);\r
+\r
+ PalCall (PAL_HALT_LIGHT, 0, 0, 0);\r
+\r
+ //\r
+ // Restore TPR\r
+ //\r
+ AsmWriteTpr (Tpr);\r
+ }\r