Currently, the value of the page tables' address is hard-coded in the
ResetVector. This patch replaces these values with a PCD dependency.
A check for the size has been added to alert the developer to rewrite
the ASM according to the new size, if it has been changed.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Marvin Haeuser <Marvin.Haeuser@outlook.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
SetCr3ForPageTables64:\r
\r
;\r
SetCr3ForPageTables64:\r
\r
;\r
- ; For OVMF, build some initial page tables at 0x800000-0x806000.\r
+ ; For OVMF, build some initial page tables at\r
+ ; PcdOvmfSecPageTablesBase - (PcdOvmfSecPageTablesBase + 0x6000).\r
- ; This range should match with PcdOvmfSecPageTablesBase and\r
- ; PcdOvmfSecPageTablesSize which are declared in the FDF files.\r
+ ; This range should match with PcdOvmfSecPageTablesSize which is\r
+ ; declared in the FDF files.\r
;\r
; At the end of PEI, the pages tables will be rebuilt into a\r
; more permanent location by DxeIpl.\r
;\r
; At the end of PEI, the pages tables will be rebuilt into a\r
; more permanent location by DxeIpl.\r
mov ecx, 6 * 0x1000 / 4\r
xor eax, eax\r
clearPageTablesMemoryLoop:\r
mov ecx, 6 * 0x1000 / 4\r
xor eax, eax\r
clearPageTablesMemoryLoop:\r
- mov dword[ecx * 4 + 0x800000 - 4], eax\r
+ mov dword[ecx * 4 + PT_ADDR (0) - 4], eax\r
loop clearPageTablesMemoryLoop\r
\r
;\r
; Top level Page Directory Pointers (1 * 512GB entry)\r
;\r
loop clearPageTablesMemoryLoop\r
\r
;\r
; Top level Page Directory Pointers (1 * 512GB entry)\r
;\r
- mov dword[0x800000], 0x801000 + PAGE_PDP_ATTR\r
+ mov dword[PT_ADDR (0)], PT_ADDR (0x1000) + PAGE_PDP_ATTR\r
\r
;\r
; Next level Page Directory Pointers (4 * 1GB entries => 4GB)\r
;\r
\r
;\r
; Next level Page Directory Pointers (4 * 1GB entries => 4GB)\r
;\r
- mov dword[0x801000], 0x802000 + PAGE_PDP_ATTR\r
- mov dword[0x801008], 0x803000 + PAGE_PDP_ATTR\r
- mov dword[0x801010], 0x804000 + PAGE_PDP_ATTR\r
- mov dword[0x801018], 0x805000 + PAGE_PDP_ATTR\r
+ mov dword[PT_ADDR (0x1000)], PT_ADDR (0x2000) + PAGE_PDP_ATTR\r
+ mov dword[PT_ADDR (0x1008)], PT_ADDR (0x3000) + PAGE_PDP_ATTR\r
+ mov dword[PT_ADDR (0x1010)], PT_ADDR (0x4000) + PAGE_PDP_ATTR\r
+ mov dword[PT_ADDR (0x1018)], PT_ADDR (0x5000) + PAGE_PDP_ATTR\r
\r
;\r
; Page Table Entries (2048 * 2MB entries => 4GB)\r
\r
;\r
; Page Table Entries (2048 * 2MB entries => 4GB)\r
dec eax\r
shl eax, 21\r
add eax, PAGE_2M_PDE_ATTR\r
dec eax\r
shl eax, 21\r
add eax, PAGE_2M_PDE_ATTR\r
- mov [ecx * 8 + 0x802000 - 8], eax\r
+ mov [ecx * 8 + PT_ADDR (0x2000 - 8)], eax\r
loop pageTableEntriesLoop\r
\r
;\r
; Set CR3 now that the paging structures are available\r
;\r
loop pageTableEntriesLoop\r
\r
;\r
; Set CR3 now that the paging structures are available\r
;\r
mov cr3, eax\r
\r
OneTimeCallRet SetCr3ForPageTables64\r
mov cr3, eax\r
\r
OneTimeCallRet SetCr3ForPageTables64\r
ResetVector.nasmb\r
\r
[Packages]\r
ResetVector.nasmb\r
\r
[Packages]\r
MdePkg/MdePkg.dec\r
UefiCpuPkg/UefiCpuPkg.dec\r
\r
[BuildOptions]\r
*_*_IA32_NASMB_FLAGS = -I$(WORKSPACE)/UefiCpuPkg/ResetVector/Vtf0/\r
*_*_X64_NASMB_FLAGS = -I$(WORKSPACE)/UefiCpuPkg/ResetVector/Vtf0/\r
MdePkg/MdePkg.dec\r
UefiCpuPkg/UefiCpuPkg.dec\r
\r
[BuildOptions]\r
*_*_IA32_NASMB_FLAGS = -I$(WORKSPACE)/UefiCpuPkg/ResetVector/Vtf0/\r
*_*_X64_NASMB_FLAGS = -I$(WORKSPACE)/UefiCpuPkg/ResetVector/Vtf0/\r
+\r
+[Pcd]\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize\r
%include "Ia32/SearchForSecEntry.asm"\r
\r
%ifdef ARCH_X64\r
%include "Ia32/SearchForSecEntry.asm"\r
\r
%ifdef ARCH_X64\r
+ #include <AutoGen.h>\r
+\r
+ %if (FixedPcdGet32 (PcdOvmfSecPageTablesSize) != 0x6000)\r
+ %error "This implementation inherently depends on PcdOvmfSecPageTablesSize"\r
+ %endif\r
+\r
+ %define PT_ADDR(Offset) (FixedPcdGet32 (PcdOvmfSecPageTablesBase) + (Offset))\r
%include "Ia32/Flat32ToFlat64.asm"\r
%include "Ia32/PageTables64.asm"\r
%endif\r
%include "Ia32/Flat32ToFlat64.asm"\r
%include "Ia32/PageTables64.asm"\r
%endif\r