Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15108
6f19259b-4bc3-4df7-8a09-
765794883524
switch (HeaderAddress->CapabilityId){\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_ADVANCED_ERROR_REPORTING_ID:\r
return PrintInterpretedExtendedCompatibilityAer(HeaderAddress, HeadersBaseAddress);\r
switch (HeaderAddress->CapabilityId){\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_ADVANCED_ERROR_REPORTING_ID:\r
return PrintInterpretedExtendedCompatibilityAer(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_CONTROL_ID:\r
return PrintInterpretedExtendedCompatibilityLinkControl(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_CONTROL_ID:\r
return PrintInterpretedExtendedCompatibilityLinkControl(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_DECLARATION_ID:\r
return PrintInterpretedExtendedCompatibilityLinkDeclaration(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_DECLARATION_ID:\r
return PrintInterpretedExtendedCompatibilityLinkDeclaration(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_SERIAL_NUMBER_ID:\r
return PrintInterpretedExtendedCompatibilitySerialNumber(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_SERIAL_NUMBER_ID:\r
return PrintInterpretedExtendedCompatibilitySerialNumber(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_POWER_BUDGETING_ID:\r
return PrintInterpretedExtendedCompatibilityPowerBudgeting(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_POWER_BUDGETING_ID:\r
return PrintInterpretedExtendedCompatibilityPowerBudgeting(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_ID:\r
return PrintInterpretedExtendedCompatibilityAcs(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_ID:\r
return PrintInterpretedExtendedCompatibilityAcs(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_LATENCE_TOLERANCE_REPORTING_ID:\r
return PrintInterpretedExtendedCompatibilityLatencyToleranceReporting(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_LATENCE_TOLERANCE_REPORTING_ID:\r
return PrintInterpretedExtendedCompatibilityLatencyToleranceReporting(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_ARI_CAPABILITY_ID:\r
return PrintInterpretedExtendedCompatibilityAri(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_ARI_CAPABILITY_ID:\r
return PrintInterpretedExtendedCompatibilityAri(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_RCRB_HEADER_ID:\r
return PrintInterpretedExtendedCompatibilityRcrb(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_RCRB_HEADER_ID:\r
return PrintInterpretedExtendedCompatibilityRcrb(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_VENDOR_SPECIFIC_ID:\r
return PrintInterpretedExtendedCompatibilityVendorSpecific(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_VENDOR_SPECIFIC_ID:\r
return PrintInterpretedExtendedCompatibilityVendorSpecific(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_DYNAMIC_POWER_ALLOCATION_ID:\r
return PrintInterpretedExtendedCompatibilityDynamicPowerAllocation(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_DYNAMIC_POWER_ALLOCATION_ID:\r
return PrintInterpretedExtendedCompatibilityDynamicPowerAllocation(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION_ID:\r
return PrintInterpretedExtendedCompatibilityECEA(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION_ID:\r
return PrintInterpretedExtendedCompatibilityECEA(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_VIRTUAL_CHANNEL_ID:\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_MULTI_FUNCTION_VIRTUAL_CHANNEL_ID:\r
return PrintInterpretedExtendedCompatibilityVirtualChannel(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_VIRTUAL_CHANNEL_ID:\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_MULTI_FUNCTION_VIRTUAL_CHANNEL_ID:\r
return PrintInterpretedExtendedCompatibilityVirtualChannel(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_MULTICAST_ID: \r
//\r
// should only be present if PCIE_CAP_DEVICEPORT_TYPE(PciExpressCapPtr->PcieCapReg) == 0100b, 0101b, or 0110b\r
//\r
return PrintInterpretedExtendedCompatibilityMulticast(HeaderAddress, HeadersBaseAddress, PciExpressCapPtr);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_MULTICAST_ID: \r
//\r
// should only be present if PCIE_CAP_DEVICEPORT_TYPE(PciExpressCapPtr->PcieCapReg) == 0100b, 0101b, or 0110b\r
//\r
return PrintInterpretedExtendedCompatibilityMulticast(HeaderAddress, HeadersBaseAddress, PciExpressCapPtr);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_RESIZABLE_BAR_ID:\r
return PrintInterpretedExtendedCompatibilityResizeableBar(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_RESIZABLE_BAR_ID:\r
return PrintInterpretedExtendedCompatibilityResizeableBar(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_TPH_ID:\r
return PrintInterpretedExtendedCompatibilityTph(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_TPH_ID:\r
return PrintInterpretedExtendedCompatibilityTph(HeaderAddress, HeadersBaseAddress);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_SECONDARY_PCIE_ID:\r
return PrintInterpretedExtendedCompatibilitySecondary(HeaderAddress, HeadersBaseAddress, PciExpressCapPtr);\r
case PCI_EXPRESS_EXTENDED_CAPABILITY_SECONDARY_PCIE_ID:\r
return PrintInterpretedExtendedCompatibilitySecondary(HeaderAddress, HeadersBaseAddress, PciExpressCapPtr);\r
default:\r
ShellPrintEx (-1, -1,\r
L"Unknown PCIe extended capability ID (%04xh). No interpretation available.\r\n",\r
HeaderAddress->CapabilityId\r
);\r
return EFI_SUCCESS;\r
default:\r
ShellPrintEx (-1, -1,\r
L"Unknown PCIe extended capability ID (%04xh). No interpretation available.\r\n",\r
HeaderAddress->CapabilityId\r
);\r
return EFI_SUCCESS;\r