git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6835
6f19259b-4bc3-4df7-8a09-
765794883524
-1 is invalidated. This function may choose to invalidate the entire\r
instruction cache if that is more efficient than invalidating the specified\r
range. If Length is 0, the no instruction cache lines are invalidated.\r
-1 is invalidated. This function may choose to invalidate the entire\r
instruction cache if that is more efficient than invalidating the specified\r
range. If Length is 0, the no instruction cache lines are invalidated.\r
+ Address is returned. This function is only available on IPF.\r
\r
If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
\r
\r
If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
\r
IN VOID *Address,\r
IN UINTN Length\r
);\r
IN VOID *Address,\r
IN UINTN Length\r
);\r
The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
An implementation may flush a larger region. This function is only available on IPF.\r
\r
The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
An implementation may flush a larger region. This function is only available on IPF.\r
\r
- @param Address The Address of cache line to be flushed.\r
+ @param Address The Address of cache line to be flushed.\r
\r
@return The address of FC instruction executed.\r
\r
\r
@return The address of FC instruction executed.\r
\r
The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
An implementation may flush a larger region. This function is only available on IPF.\r
\r
The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
An implementation may flush a larger region. This function is only available on IPF.\r
\r
- @param Address The Address of cache line to be flushed.\r
+ @param Address The Address of cache line to be flushed.\r
\r
@return The address of FC.I instruction executed.\r
\r
\r
@return The address of FC.I instruction executed.\r
\r
must either guarantee that Index is valid, or the caller must set up fault handlers to\r
catch the faults. This function is only available on IPF.\r
\r
must either guarantee that Index is valid, or the caller must set up fault handlers to\r
catch the faults. This function is only available on IPF.\r
\r
- @param Index The 8-bit Processor Identifier Register index to read.\r
+ @param Index The 8-bit Processor Identifier Register index to read.\r
\r
@return The current value of Processor Identifier Register specified by Index.\r
\r
\r
@return The current value of Processor Identifier Register specified by Index.\r
\r
IN UINTN Length\r
)\r
{\r
IN UINTN Length\r
)\r
{\r
- return IpfFlushCacheRange (Address, Length);\r
+ return AsmFlushCacheRange (Address, Length);\r
{\r
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
\r
{\r
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
\r
- return IpfFlushCacheRange (Address, Length);\r
+ return AsmFlushCacheRange (Address, Length);\r
{\r
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
\r
{\r
ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);\r
\r
- return IpfFlushCacheRange (Address, Length);\r
+ return AsmFlushCacheRange (Address, Length);\r
IN UINTN Length\r
)\r
{\r
IN UINTN Length\r
)\r
{\r
- return IpfFlushCacheRange (Address, Length);\r
+ return AsmFlushCacheRange (Address, Length);\r
// containing Address + Length -1 is invalidated. This function may choose to\r
// invalidate the entire instruction cache if that is more efficient than\r
// invalidating the specified range. If Length is 0, the no instruction cache\r
// containing Address + Length -1 is invalidated. This function may choose to\r
// invalidate the entire instruction cache if that is more efficient than\r
// invalidating the specified range. If Length is 0, the no instruction cache\r
-// lines are invalidated. Address is returned.\r
+// lines are invalidated. Address is returned. \r
+// This function is only available on IPF.\r
//\r
// If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
//\r
//\r
// If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
//\r
// \r
// VOID *\r
// EFIAPI\r
// \r
// VOID *\r
// EFIAPI\r
-// IpfFlushCacheRange (\r
+// AsmFlushCacheRange (\r
// IN VOID *Address,\r
// IN UINTN Length\r
// );\r
//\r
// IN VOID *Address,\r
// IN UINTN Length\r
// );\r
//\r
-PROCEDURE_ENTRY (IpfFlushCacheRange)\r
+PROCEDURE_ENTRY (AsmFlushCacheRange)\r
\r
NESTED_SETUP (5,8,0,0)\r
\r
\r
NESTED_SETUP (5,8,0,0)\r
\r
mov r8 = in0 // return *Address\r
NESTED_RETURN\r
\r
mov r8 = in0 // return *Address\r
NESTED_RETURN\r
\r
-PROCEDURE_EXIT (IpfFlushCacheRange)\r
+PROCEDURE_EXIT (AsmFlushCacheRange)\r