Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Roy Franz <roy.franz@linaro.org>
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14616
6f19259b-4bc3-4df7-8a09-
765794883524
\r
ASM_PFX(ArmSetHighVectors):\r
mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)\r
\r
ASM_PFX(ArmSetHighVectors):\r
mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)\r
- orr r0, r0, #0x00002000 @ clear V bit\r
+ orr r0, r0, #0x00002000 @ Set V bit\r
mcr p15, 0, r0, c1, c0, 0 @ Write R0 into SCTLR (Write control register configuration data)\r
isb\r
bx LR\r
mcr p15, 0, r0, c1, c0, 0 @ Write R0 into SCTLR (Write control register configuration data)\r
isb\r
bx LR\r
\r
ArmSetHighVectors\r
mrc p15, 0, r0, c1, c0, 0 ; Read SCTLR into R0 (Read control register configuration data)\r
\r
ArmSetHighVectors\r
mrc p15, 0, r0, c1, c0, 0 ; Read SCTLR into R0 (Read control register configuration data)\r
- orr r0, r0, #0x00002000 ; clear V bit\r
+ orr r0, r0, #0x00002000 ; Set V bit\r
mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)\r
isb\r
bx LR\r
mcr p15, 0, r0, c1, c0, 0 ; Write R0 into SCTLR (Write control register configuration data)\r
isb\r
bx LR\r