IntelFsp2Pkg: Add FSP 2.3 header support

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3921

This patch adds a couple of fields supported in FSP 2.3 header from
both header generation and tool support perspective.

Signed-off-by: Loo Tung Lun <tung.lun.loo@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

diff --git a/IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py b/IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py
index 680b90e09d8d31810ba491bb219fb307c39f34c1..527150428277c0ea1ce5696852f5743c2e26767f 100644 (file)
--- a/IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py
+++ b/IntelFsp2Pkg/Tools/ConfigEditor/ConfigEditor.py
@@ -13,6 +13,7 @@ import tkinter.ttk as ttk
 import tkinter.messagebox as messagebox\r
 import tkinter.filedialog as filedialog\r
 \r
 import tkinter.messagebox as messagebox\r
 import tkinter.filedialog as filedialog\r
 \r

+from pickle import FALSE, TRUE\r

 from pathlib import Path\r
 from GenYamlCfg import CGenYamlCfg, bytes_to_value, \\r
       bytes_to_bracket_str, value_to_bytes, array_str_to_value\r
 from pathlib import Path\r
 from GenYamlCfg import CGenYamlCfg, bytes_to_value, \\r
       bytes_to_bracket_str, value_to_bytes, array_str_to_value\r


@@ -458,7 +459,10 @@ class FSP_INFORMATION_HEADER(Structure):
         ('NotifyPhaseEntryOffset',     c_uint32),\r
         ('FspMemoryInitEntryOffset',   c_uint32),\r
         ('TempRamExitEntryOffset',     c_uint32),\r
         ('NotifyPhaseEntryOffset',     c_uint32),\r
         ('FspMemoryInitEntryOffset',   c_uint32),\r
         ('TempRamExitEntryOffset',     c_uint32),\r

-        ('FspSiliconInitEntryOffset',  c_uint32)\r
+        ('FspSiliconInitEntryOffset',  c_uint32),\r
+        ('FspMultiPhaseSiInitEntryOffset', c_uint32),\r
+        ('ExtendedImageRevision',  c_uint16),\r
+        ('Reserved4',  c_uint16)\r

         ]\r
 \r
 \r
         ]\r
 \r
 \r


@@ -700,6 +704,34 @@ class FirmwareDevice:
                     raise Exception("ERROR: Incorrect FV size in image !")\r
         self.CheckFsp()\r
 \r
                     raise Exception("ERROR: Incorrect FV size in image !")\r
         self.CheckFsp()\r
 \r

+    def IsIntegerType(self, val):\r
+        if sys.version_info[0] < 3:\r
+            if type(val) in (int, long):\r
+                return True\r
+        else:\r
+            if type(val) is int:\r
+                return True\r
+        return False\r
+\r
+    def ConvertRevisionString(self, obj):\r
+        for field in obj._fields_:\r
+            key = field[0]\r
+            val = getattr(obj, key)\r
+            rep = ''\r
+\r
+            if self.IsIntegerType(val):\r
+                if (key == 'ImageRevision'):\r
+                    FspImageRevisionMajor = ((val >> 24) & 0xFF)\r
+                    FspImageRevisionMinor = ((val >> 16) & 0xFF)\r
+                    FspImageRevisionRevision = ((val >> 8) & 0xFF)\r
+                    FspImageRevisionBuildNumber = (val & 0xFF)\r
+                    rep = '0x%08X' % val\r
+                elif (key == 'ExtendedImageRevision'):\r
+                    FspImageRevisionRevision |= (val & 0xFF00)\r
+                    FspImageRevisionBuildNumber |= ((val << 8) & 0xFF00)\r
+                    rep = "0x%04X ('%02X.%02X.%04X.%04X')" % (val, FspImageRevisionMajor, FspImageRevisionMinor, FspImageRevisionRevision, FspImageRevisionBuildNumber)\r
+                    return rep\r
+\r

     def OutputFsp(self):\r
         def copy_text_to_clipboard():\r
             window.clipboard_clear()\r
     def OutputFsp(self):\r
         def copy_text_to_clipboard():\r
             window.clipboard_clear()\r


@@ -721,7 +753,8 @@ class FirmwareDevice:
         self.OutputText = self.OutputText + "Fsp Header Details \n\n"\r
         while i < len(self.FihList):\r
             try:\r
         self.OutputText = self.OutputText + "Fsp Header Details \n\n"\r
         while i < len(self.FihList):\r
             try:\r

-                self.OutputText += str(self.BuildList[i].decode()) + "\n"\r
+                # self.OutputText += str(self.BuildList[i].decode()) + "\n"\r
+                self.OutputText += str(self.BuildList[i]) + "\n"\r

             except Exception:\r
                 self.OutputText += "No description found\n"\r
             self.OutputText += "FSP Header :\n "\r
             except Exception:\r
                 self.OutputText += "No description found\n"\r
             self.OutputText += "FSP Header :\n "\r


@@ -729,6 +762,8 @@ class FirmwareDevice:
                 str(self.FihList[i].Signature.decode('utf-8')) + "\n "\r
             self.OutputText += "Header Length : " + \\r
                 str(hex(self.FihList[i].HeaderLength)) + "\n "\r
                 str(self.FihList[i].Signature.decode('utf-8')) + "\n "\r
             self.OutputText += "Header Length : " + \\r
                 str(hex(self.FihList[i].HeaderLength)) + "\n "\r

+            self.OutputText += "Reserved1 : " + \\r
+                str(hex(self.FihList[i].Reserved1)) + "\n "\r

             self.OutputText += "Header Revision : " + \\r
                 str(hex(self.FihList[i].HeaderRevision)) + "\n "\r
             self.OutputText += "Spec Version : " + \\r
             self.OutputText += "Header Revision : " + \\r
                 str(hex(self.FihList[i].HeaderRevision)) + "\n "\r
             self.OutputText += "Spec Version : " + \\r


@@ -743,15 +778,17 @@ class FirmwareDevice:
                 str(hex(self.FihList[i].ImageBase)) + "\n "\r
             self.OutputText += "Image Attribute : " + \\r
                 str(hex(self.FihList[i].ImageAttribute)) + "\n "\r
                 str(hex(self.FihList[i].ImageBase)) + "\n "\r
             self.OutputText += "Image Attribute : " + \\r
                 str(hex(self.FihList[i].ImageAttribute)) + "\n "\r

+            self.OutputText += "Component Attribute : " + \\r
+                str(hex(self.FihList[i].ComponentAttribute)) + "\n "\r

             self.OutputText += "Cfg Region Offset : " + \\r
                 str(hex(self.FihList[i].CfgRegionOffset)) + "\n "\r
             self.OutputText += "Cfg Region Size : " + \\r
                 str(hex(self.FihList[i].CfgRegionSize)) + "\n "\r
             self.OutputText += "Cfg Region Offset : " + \\r
                 str(hex(self.FihList[i].CfgRegionOffset)) + "\n "\r
             self.OutputText += "Cfg Region Size : " + \\r
                 str(hex(self.FihList[i].CfgRegionSize)) + "\n "\r

-            self.OutputText += "API Entry Num : " + \\r
+            self.OutputText += "Reserved2 : " + \\r

                 str(hex(self.FihList[i].Reserved2)) + "\n "\r
             self.OutputText += "Temp Ram Init Entry : " + \\r
                 str(hex(self.FihList[i].TempRamInitEntryOffset)) + "\n "\r
                 str(hex(self.FihList[i].Reserved2)) + "\n "\r
             self.OutputText += "Temp Ram Init Entry : " + \\r
                 str(hex(self.FihList[i].TempRamInitEntryOffset)) + "\n "\r

-            self.OutputText += "FSP Init Entry : " + \\r
+            self.OutputText += "Reserved3 : " + \\r

                 str(hex(self.FihList[i].Reserved3)) + "\n "\r
             self.OutputText += "Notify Phase Entry : " + \\r
                 str(hex(self.FihList[i].NotifyPhaseEntryOffset)) + "\n "\r
                 str(hex(self.FihList[i].Reserved3)) + "\n "\r
             self.OutputText += "Notify Phase Entry : " + \\r
                 str(hex(self.FihList[i].NotifyPhaseEntryOffset)) + "\n "\r


@@ -760,7 +797,23 @@ class FirmwareDevice:
             self.OutputText += "Temp Ram Exit Entry : " + \\r
                 str(hex(self.FihList[i].TempRamExitEntryOffset)) + "\n "\r
             self.OutputText += "Fsp Silicon Init Entry : " + \\r
             self.OutputText += "Temp Ram Exit Entry : " + \\r
                 str(hex(self.FihList[i].TempRamExitEntryOffset)) + "\n "\r
             self.OutputText += "Fsp Silicon Init Entry : " + \\r

-                str(hex(self.FihList[i].FspSiliconInitEntryOffset)) + "\n\n"\r
+                str(hex(self.FihList[i].FspSiliconInitEntryOffset)) + "\n "\r
+            self.OutputText += "Fsp Multi Phase Si Init Entry : " + \\r
+                str(hex(self.FihList[i].FspMultiPhaseSiInitEntryOffset)) + "\n "\r
+\r
+            # display ExtendedImageRevision & Reserved4 if HeaderRevision >= 6\r
+            for fsp in self.FihList:\r
+                if fsp.HeaderRevision >= 6:\r
+                    Display_ExtndImgRev = TRUE\r
+                else:\r
+                    Display_ExtndImgRev = FALSE\r
+                    self.OutputText += "\n"\r
+            if  Display_ExtndImgRev == TRUE:\r
+                self.OutputText += "ExtendedImageRevision : " + \\r
+                    str(self.ConvertRevisionString(self.FihList[i])) + "\n "\r
+                self.OutputText += "Reserved4 : " + \\r
+                    str(hex(self.FihList[i].Reserved4)) + "\n\n"\r
+\r

             self.OutputText += "FSP Extended Header:\n "\r
             self.OutputText += "Signature : " + \\r
                 str(self.FspExtList[i].Signature.decode('utf-8')) + "\n "\r
             self.OutputText += "FSP Extended Header:\n "\r
             self.OutputText += "Signature : " + \\r
                 str(self.FspExtList[i].Signature.decode('utf-8')) + "\n "\r

diff --git a/IntelFsp2Pkg/Tools/ConfigEditor/GenYamlCfg.py b/IntelFsp2Pkg/Tools/ConfigEditor/GenYamlCfg.py
index b593885807df04242a2475256965192464d05230..90d7a11184f9f15299de990fbb1500566430afa7 100644 (file)
--- a/IntelFsp2Pkg/Tools/ConfigEditor/GenYamlCfg.py
+++ b/IntelFsp2Pkg/Tools/ConfigEditor/GenYamlCfg.py
@@ -929,17 +929,25 @@ into %d bytes !" % (value_str, length))
                                                                       ]]:\r
                     tmp_list.append((op_val, op_str))\r
             else:\r
                                                                       ]]:\r
                     tmp_list.append((op_val, op_str))\r
             else:\r

-                opt_list = item['option'].split(',')\r
+                if item['option'].find(';') != -1:\r
+                    opt_list = item['option'].split(';')\r
+                else:\r
+                    opt_list = re.split(', ', item['option'])\r

                 for option in opt_list:\r
                     option = option.strip()\r
                     try:\r
                 for option in opt_list:\r
                     option = option.strip()\r
                     try:\r

-                        (op_val, op_str) = option.split(':')\r
+                        if option.find(':') != -1:\r
+                            (op_val, op_str) = option.split(':')\r
+                        else:\r
+                            op_val = option\r
+                            op_str = option\r

                     except Exception:\r
                     except Exception:\r

-                        raise SystemExit("Exception: Invalide \\r
+                        raise SystemExit("Exception: Invalid \\r

 option format '%s' !" % option)\r
                     tmp_list.append((op_val, op_str))\r
         return tmp_list\r
 \r
 option format '%s' !" % option)\r
                     tmp_list.append((op_val, op_str))\r
         return tmp_list\r
 \r

+\r

     def get_page_title(self, page_id, top=None):\r
         if top is None:\r
             top = self.get_cfg_page()['root']\r
     def get_page_title(self, page_id, top=None):\r
         if top is None:\r
             top = self.get_cfg_page()['root']\r