BaseTools/GenFw AARCH64: add support for relative data relocations

This adds support to the ELF to PE/COFF conversion performed by GenFw for
the AArch64 ELF relocation types R_AARCH64_PREL64, R_AARCH64_PREL32 and
R_AARCH64_PREL16. Since we already require the ELF and PE/COFF section
layouts to be identical in order to support other relative relocation
types, this is simply a matter of whitelisting these new relocation types
in the same way.

While we're at it, clean up the code a bit, and add a comment explaining
why these relocations are ignored in WriteRelocations64 ().

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>

diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/GenFw/Elf64Convert.c
index 90d80a22daf2708310b7b3e0ea07159fd62c460f..fb85b3821b38afa044e92541aa762f249baf9ed8 100644 (file)
--- a/BaseTools/Source/C/GenFw/Elf64Convert.c
+++ b/BaseTools/Source/C/GenFw/Elf64Convert.c
@@ -767,6 +767,9 @@ WriteSections64 (
           case R_AARCH64_LD_PREL_LO19:\r
           case R_AARCH64_CALL26:\r
           case R_AARCH64_JUMP26:\r
+          case R_AARCH64_PREL64:\r
+          case R_AARCH64_PREL32:\r
+          case R_AARCH64_PREL16:\r
             //\r
             // The GCC toolchains (i.e., binutils) may corrupt section relative\r
             // relocations when emitting relocation sections into fully linked\r
@@ -855,20 +858,13 @@ WriteRelocations64 (
 \r
             switch (ELF_R_TYPE(Rel->r_info)) {\r
             case R_AARCH64_ADR_PREL_LO21:\r
-              break;\r
-\r
             case R_AARCH64_CONDBR19:\r
-              break;\r
-\r
             case R_AARCH64_LD_PREL_LO19:\r
-              break;\r
-\r
             case R_AARCH64_CALL26:\r
-              break;\r
-\r
             case R_AARCH64_JUMP26:\r
-              break;\r
-\r
+            case R_AARCH64_PREL64:\r
+            case R_AARCH64_PREL32:\r
+            case R_AARCH64_PREL16:\r
             case R_AARCH64_ADR_PREL_PG_HI21:\r
             case R_AARCH64_ADD_ABS_LO12_NC:\r
             case R_AARCH64_LDST8_ABS_LO12_NC:\r
@@ -876,6 +872,12 @@ WriteRelocations64 (
             case R_AARCH64_LDST32_ABS_LO12_NC:\r
             case R_AARCH64_LDST64_ABS_LO12_NC:\r
             case R_AARCH64_LDST128_ABS_LO12_NC:\r
+              //\r
+              // No fixups are required for relative relocations, provided that\r
+              // the relative offsets between sections have been preserved in\r
+              // the ELF to PE/COFF conversion. We have already asserted that\r
+              // this is the case in WriteSections64 ().\r
+              //\r
               break;\r
 \r
             case R_AARCH64_ABS64:\r