MdeModulePkg/AtaAtapiPassThru: don't write read-only AHCI MMIO register

Per AHCI 1.1 spec, AE bit of GHC register is read-only if CAP.SAM is 1

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16321 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
index 72b1e5cc7e85f32e8215af97813bc5e69595df54..186d40c062ac7e8c3745783ce1fa5b870b8afdf1 100644 (file)
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
@@ -1440,8 +1440,19 @@ AhciReset (
 {\r
   UINT64                 Delay;\r
   UINT32                 Value;\r
+  UINT32                 Capability;\r
 \r
-  AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE);\r
+  //\r
+  // Collect AHCI controller information\r
+  //\r
+  Capability = AhciReadReg (PciIo, EFI_AHCI_CAPABILITY_OFFSET);\r
+  \r
+  //\r
+  // Enable AE before accessing any AHCI registers if Supports AHCI Mode Only is not set\r
+  //\r
+  if ((Capability & EFI_AHCI_CAP_SAM) == 0) {\r
+    AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE);\r
+  }\r
 \r
   AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_RESET);\r
 \r
@@ -2245,15 +2256,17 @@ AhciModeInitialization (
   }\r
 \r
   //\r
-  // Enable AE before accessing any AHCI registers\r
+  // Collect AHCI controller information\r
   //\r
-  AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE);\r
-\r
+  Capability = AhciReadReg (PciIo, EFI_AHCI_CAPABILITY_OFFSET);\r
+  \r
   //\r
-  // Collect AHCI controller information\r
+  // Enable AE before accessing any AHCI registers if Supports AHCI Mode Only is not set\r
   //\r
-  Capability           = AhciReadReg(PciIo, EFI_AHCI_CAPABILITY_OFFSET);\r
-\r
+  if ((Capability & EFI_AHCI_CAP_SAM) == 0) {\r
+    AhciOrReg (PciIo, EFI_AHCI_GHC_OFFSET, EFI_AHCI_GHC_ENABLE);\r
+  }\r
+  \r
   //\r
   // Get the number of command slots per port supported by this HBA.\r
   //\r

diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
index 485b64799eacb57a64a392e23f6dbb0b73b274d3..6401fb2e9fcdbff4f8b0d6f3dad387b93a4854c5 100644 (file)
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
@@ -1,7 +1,7 @@
 /** @file\r
   Header file for AHCI mode of ATA host controller.\r
   \r
-  Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials                          \r
   are licensed and made available under the terms and conditions of the BSD License         \r
   which accompanies this distribution.  The full text of the license may be found at        \r
@@ -17,6 +17,7 @@
 #define EFI_AHCI_BAR_INDEX                     0x05\r
 \r
 #define EFI_AHCI_CAPABILITY_OFFSET             0x0000\r
+#define   EFI_AHCI_CAP_SAM                     BIT18\r
 #define   EFI_AHCI_CAP_SSS                     BIT27\r
 #define   EFI_AHCI_CAP_S64A                    BIT31\r
 #define EFI_AHCI_GHC_OFFSET                    0x0004\r