]> git.proxmox.com Git - mirror_edk2.git/commitdiff
ShellPkg/Pci: Add valid check for PCI extended config space parser
authorVincentX Ke <vincentx.ke@intel.com>
Sat, 10 Apr 2021 14:15:09 +0000 (22:15 +0800)
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Mon, 22 Mar 2021 01:37:30 +0000 (01:37 +0000)
Bugzilla: 3262 (https://bugzilla.tianocore.org/show_bug.cgi?id=3262)

No need to print PCIe details while CapabilityId is 0xFFFF.
Limit the NextCapabilityOffset to PCI configuration space.

Signed-off-by: VincentX Ke <vincentx.ke@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c

index a2f04d8db58378bbcd89b1a1672add2003afa15b..1e5dc75e27fa116f1106b890c8cff14202a63266 100644 (file)
@@ -2038,12 +2038,14 @@ LocatePciCapability (
 \r
   @param[in] PciExpressCap       PCI Express capability buffer.\r
   @param[in] ExtendedConfigSpace PCI Express extended configuration space.\r
+  @param[in] ExtendedConfigSize  PCI Express extended configuration size.\r
   @param[in] ExtendedCapability  PCI Express extended capability ID to explain.\r
 **/\r
 VOID\r
 PciExplainPciExpress (\r
   IN  PCI_CAPABILITY_PCIEXP                  *PciExpressCap,\r
   IN  UINT8                                  *ExtendedConfigSpace,\r
+  IN  UINTN                                  ExtendedConfigSize,\r
   IN CONST UINT16                            ExtendedCapability\r
   );\r
 \r
@@ -2921,6 +2923,7 @@ ShellCommandRunPci (
         PciExplainPciExpress (\r
           (PCI_CAPABILITY_PCIEXP *) ((UINT8 *) &ConfigSpace + PcieCapabilityPtr),\r
           ExtendedConfigSpace,\r
+          ExtendedConfigSize,\r
           ExtendedCapability\r
           );\r
       }\r
@@ -5698,12 +5701,14 @@ PrintPciExtendedCapabilityDetails(
 \r
   @param[in] PciExpressCap       PCI Express capability buffer.\r
   @param[in] ExtendedConfigSpace PCI Express extended configuration space.\r
+  @param[in] ExtendedConfigSize  PCI Express extended configuration size.\r
   @param[in] ExtendedCapability  PCI Express extended capability ID to explain.\r
 **/\r
 VOID\r
 PciExplainPciExpress (\r
   IN  PCI_CAPABILITY_PCIEXP                  *PciExpressCap,\r
   IN  UINT8                                  *ExtendedConfigSpace,\r
+  IN  UINTN                                  ExtendedConfigSize,\r
   IN CONST UINT16                            ExtendedCapability\r
   )\r
 {\r
@@ -5786,7 +5791,7 @@ PciExplainPciExpress (
   }\r
 \r
   ExtHdr = (PCI_EXP_EXT_HDR*)ExtendedConfigSpace;\r
-  while (ExtHdr->CapabilityId != 0 && ExtHdr->CapabilityVersion != 0) {\r
+  while (ExtHdr->CapabilityId != 0 && ExtHdr->CapabilityVersion != 0 && ExtHdr->CapabilityId != 0xFFFF) {\r
     //\r
     // Process this item\r
     //\r
@@ -5800,7 +5805,8 @@ PciExplainPciExpress (
     //\r
     // Advance to the next item if it exists\r
     //\r
-    if (ExtHdr->NextCapabilityOffset != 0) {\r
+    if (ExtHdr->NextCapabilityOffset != 0 &&\r
+       (ExtHdr->NextCapabilityOffset <= (UINT32) (ExtendedConfigSize + EFI_PCIE_CAPABILITY_BASE_OFFSET - sizeof (PCI_EXP_EXT_HDR)))) {\r
       ExtHdr = (PCI_EXP_EXT_HDR*)(ExtendedConfigSpace + ExtHdr->NextCapabilityOffset - EFI_PCIE_CAPABILITY_BASE_OFFSET);\r
     } else {\r
       break;\r