MdeModulePkg: DxeCore MemoryPool Algorithm Update

Use 128 bytes as the start size region to be same to previous one.

64 bytes is small as the first range. On X64 arch, POOL_OVERHEAD
takes 40 bytes, the pool data less than 24 bytes can be fit into
it. But, the real allocation is few that can't reduce its free pool
link list. And, the second range (64~128) has more allocation
that also increases the free pool link list of the first range.
Then, the link list will become longer and longer. When LinkList
check enable in DEBUG tip, the long link list will bring the
additional overhead and bad performance. Here is the performance
data collected in our X64 platform with DEBUG enable.
64  byte: 22 seconds in BDS phase
128 byte: 19.6 seconds in BDS phase

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>

diff --git a/MdeModulePkg/Core/Dxe/Mem/Pool.c b/MdeModulePkg/Core/Dxe/Mem/Pool.c
index fec20a9e6eee4e24c3b03a4037b8dcd2753d2d34..2980e2293e3d1dadd59e4130cb6c7387aef8beda 100644 (file)
--- a/MdeModulePkg/Core/Dxe/Mem/Pool.c
+++ b/MdeModulePkg/Core/Dxe/Mem/Pool.c
@@ -52,7 +52,7 @@ typedef struct {
 // as we would in a strict power-of-2 sequence\r
 //\r
 STATIC CONST UINT16 mPoolSizeTable[] = {\r
-  64, 128, 192, 320, 512, 832, 1344, 2176, 3520, 5696, 9216, 14912, 24128\r
+  128, 256, 384, 640, 1024, 1664, 2688, 4352, 7040, 11392, 18432, 29824\r
 };\r
 \r
 #define SIZE_TO_LIST(a)   (GetPoolIndexFromSize (a))\r