IN UINTN Bits\r
);\r
\r
+RETURN_STATUS\r
+ArmSetMemoryRegionNoExec (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ );\r
+\r
+RETURN_STATUS\r
+ArmClearMemoryRegionNoExec (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ );\r
+\r
+RETURN_STATUS\r
+ArmSetMemoryRegionReadOnly (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ );\r
+\r
+RETURN_STATUS\r
+ArmClearMemoryRegionReadOnly (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ );\r
+\r
#endif // __ARM_LIB__\r
return RETURN_SUCCESS;\r
}\r
\r
+STATIC\r
+RETURN_STATUS\r
+SetMemoryRegionAttribute (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN UINT64 Attributes,\r
+ IN UINT64 BlockEntryMask\r
+ )\r
+{\r
+ RETURN_STATUS Status;\r
+ UINT64 *RootTable;\r
+\r
+ RootTable = ArmGetTTBR0BaseAddress ();\r
+\r
+ Status = UpdateRegionMapping (RootTable, BaseAddress, Length, Attributes, BlockEntryMask);\r
+ if (RETURN_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+\r
+ // Invalidate all TLB entries so changes are synced\r
+ ArmInvalidateTlb ();\r
+\r
+ return RETURN_SUCCESS;\r
+}\r
+\r
+RETURN_STATUS\r
+ArmSetMemoryRegionNoExec (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ )\r
+{\r
+ UINT64 Val;\r
+\r
+ if (ArmReadCurrentEL () == AARCH64_EL1) {\r
+ Val = TT_PXN_MASK | TT_UXN_MASK;\r
+ } else {\r
+ Val = TT_XN_MASK;\r
+ }\r
+\r
+ return SetMemoryRegionAttribute (\r
+ BaseAddress,\r
+ Length,\r
+ Val,\r
+ ~TT_ADDRESS_MASK_BLOCK_ENTRY);\r
+}\r
+\r
+RETURN_STATUS\r
+ArmClearMemoryRegionNoExec (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ )\r
+{\r
+ UINT64 Mask;\r
+\r
+ // XN maps to UXN in the EL1&0 translation regime\r
+ Mask = ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_PXN_MASK | TT_XN_MASK);\r
+\r
+ return SetMemoryRegionAttribute (\r
+ BaseAddress,\r
+ Length,\r
+ 0,\r
+ Mask);\r
+}\r
+\r
+RETURN_STATUS\r
+ArmSetMemoryRegionReadOnly (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ )\r
+{\r
+ return SetMemoryRegionAttribute (\r
+ BaseAddress,\r
+ Length,\r
+ TT_AP_RO_RO,\r
+ ~TT_ADDRESS_MASK_BLOCK_ENTRY);\r
+}\r
+\r
+RETURN_STATUS\r
+ArmClearMemoryRegionReadOnly (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ )\r
+{\r
+ return SetMemoryRegionAttribute (\r
+ BaseAddress,\r
+ Length,\r
+ TT_AP_NO_RO,\r
+ ~(TT_ADDRESS_MASK_BLOCK_ENTRY | TT_AP_MASK));\r
+}\r
+\r
RETURN_STATUS\r
EFIAPI\r
ArmConfigureMmu (\r
ArmEnableMmu();\r
return RETURN_SUCCESS;\r
}\r
+\r
+RETURN_STATUS\r
+ArmSetMemoryRegionNoExec (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ )\r
+{\r
+ return RETURN_UNSUPPORTED;\r
+}\r
+\r
+RETURN_STATUS\r
+ArmClearMemoryRegionNoExec (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ )\r
+{\r
+ return RETURN_UNSUPPORTED;\r
+}\r
+\r
+RETURN_STATUS\r
+ArmSetMemoryRegionReadOnly (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ )\r
+{\r
+ return RETURN_UNSUPPORTED;\r
+}\r
+\r
+RETURN_STATUS\r
+ArmClearMemoryRegionReadOnly (\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length\r
+ )\r
+{\r
+ return RETURN_UNSUPPORTED;\r
+}\r