SetCr3ForPageTables64:\r
\r
;\r
- ; For OVMF, build some initial page tables at 0x800000-0x806000.\r
+ ; For OVMF, build some initial page tables at\r
+ ; PcdOvmfSecPageTablesBase - (PcdOvmfSecPageTablesBase + 0x6000).\r
;\r
- ; This range should match with PcdOvmfSecPageTablesBase and\r
- ; PcdOvmfSecPageTablesSize which are declared in the FDF files.\r
+ ; This range should match with PcdOvmfSecPageTablesSize which is\r
+ ; declared in the FDF files.\r
;\r
; At the end of PEI, the pages tables will be rebuilt into a\r
; more permanent location by DxeIpl.\r
mov ecx, 6 * 0x1000 / 4\r
xor eax, eax\r
clearPageTablesMemoryLoop:\r
- mov dword[ecx * 4 + 0x800000 - 4], eax\r
+ mov dword[ecx * 4 + PT_ADDR (0) - 4], eax\r
loop clearPageTablesMemoryLoop\r
\r
;\r
; Top level Page Directory Pointers (1 * 512GB entry)\r
;\r
- mov dword[0x800000], 0x801000 + PAGE_PDP_ATTR\r
+ mov dword[PT_ADDR (0)], PT_ADDR (0x1000) + PAGE_PDP_ATTR\r
\r
;\r
; Next level Page Directory Pointers (4 * 1GB entries => 4GB)\r
;\r
- mov dword[0x801000], 0x802000 + PAGE_PDP_ATTR\r
- mov dword[0x801008], 0x803000 + PAGE_PDP_ATTR\r
- mov dword[0x801010], 0x804000 + PAGE_PDP_ATTR\r
- mov dword[0x801018], 0x805000 + PAGE_PDP_ATTR\r
+ mov dword[PT_ADDR (0x1000)], PT_ADDR (0x2000) + PAGE_PDP_ATTR\r
+ mov dword[PT_ADDR (0x1008)], PT_ADDR (0x3000) + PAGE_PDP_ATTR\r
+ mov dword[PT_ADDR (0x1010)], PT_ADDR (0x4000) + PAGE_PDP_ATTR\r
+ mov dword[PT_ADDR (0x1018)], PT_ADDR (0x5000) + PAGE_PDP_ATTR\r
\r
;\r
; Page Table Entries (2048 * 2MB entries => 4GB)\r
dec eax\r
shl eax, 21\r
add eax, PAGE_2M_PDE_ATTR\r
- mov [ecx * 8 + 0x802000 - 8], eax\r
+ mov [ecx * 8 + PT_ADDR (0x2000 - 8)], eax\r
loop pageTableEntriesLoop\r
\r
;\r
; Set CR3 now that the paging structures are available\r
;\r
- mov eax, 0x800000\r
+ mov eax, PT_ADDR (0)\r
mov cr3, eax\r
\r
OneTimeCallRet SetCr3ForPageTables64\r