MdePkg/Register: Fix various typos

Fix various typos in comments and documentation.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Signed-off-by: Antoine Coeur <coeur@gmx.fr>
Reviewed-by: Philippe Mathieu-Daude <philmd@redhat.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Philippe Mathieu-Daude <philmd@redhat.com>
Message-Id: <20200207010831.9046-29-philmd@redhat.com>

diff --git a/MdePkg/Include/Register/Amd/Cpuid.h b/MdePkg/Include/Register/Amd/Cpuid.h
index ad1ba4d016e002e8b65ed4cdaccaf1768ed94150..8e91e84b767fbf7699df9eabebc77348b57ce34d 100644 (file)
--- a/MdePkg/Include/Register/Amd/Cpuid.h
+++ b/MdePkg/Include/Register/Amd/Cpuid.h
@@ -11,7 +11,7 @@
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
   @par Specification Reference:\r
-  AMD64 Architecture Programming Manaul volume 2, March 2017, Sections 15.34\r
+  AMD64 Architecture Programming Manual volume 2, March 2017, Sections 15.34\r
 \r
 **/\r
 \r
@@ -364,7 +364,7 @@ typedef union {
     ///\r
     UINT32  Page1GB:1;\r
     ///\r
-    /// [Bit 27] RDTSCP intructions.\r
+    /// [Bit 27] RDTSCP instructions.\r
     ///\r
     UINT32  RDTSCP:1;\r
     ///\r
@@ -513,9 +513,9 @@ typedef union {
 \r
   @retval  EAX  Extended APIC ID described by the type\r
                 CPUID_AMD_PROCESSOR_TOPOLOGY_EAX.\r
-  @retval  EBX  Core Indentifiers described by the type\r
+  @retval  EBX  Core Identifiers described by the type\r
                 CPUID_AMD_PROCESSOR_TOPOLOGY_EBX.\r
-  @retval  ECX  Node Indentifiers described by the type\r
+  @retval  ECX  Node Identifiers described by the type\r
                 CPUID_AMD_PROCESSOR_TOPOLOGY_ECX.\r
   @retval  EDX  Reserved.\r
 **/\r

diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h b/MdePkg/Include/Register/Amd/Fam17Msr.h
index 37b935dcdb3017506d1b7599b9a27a886f056efd..6ef45a9b21d38aae11dcd86d3153d8b9d73f6fb5 100644 (file)
--- a/MdePkg/Include/Register/Amd/Fam17Msr.h
+++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
@@ -10,7 +10,7 @@
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
   @par Specification Reference:\r
-  AMD64 Architecture Programming Manaul volume 2, March 2017, Sections 15.34\r
+  AMD64 Architecture Programming Manual volume 2, March 2017, Sections 15.34\r
 \r
 **/\r
 \r

diff --git a/MdePkg/Include/Register/Amd/Msr.h b/MdePkg/Include/Register/Amd/Msr.h
index e74de7a1df48613c365f0e3d8d282d00d59b1006..084eb892cdd9e3e2a92f8dc7e1f7162fb788a28c 100644 (file)
--- a/MdePkg/Include/Register/Amd/Msr.h
+++ b/MdePkg/Include/Register/Amd/Msr.h
@@ -10,7 +10,7 @@
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
   @par Specification Reference:\r
-  AMD64 Architecture Programming Manaul volume 2, March 2017, Sections 15.34\r
+  AMD64 Architecture Programming Manual volume 2, March 2017, Sections 15.34\r
 \r
 **/\r
 \r

diff --git a/MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h b/MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h
index 2edc1363b7c438f5299acb0b2b68244044caab34..c56d20df66a45008d2287d17c9e62a1099b293de 100644 (file)
--- a/MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h
+++ b/MdePkg/Include/Register/Intel/Msr/GoldmontPlusMsr.h
@@ -1,5 +1,5 @@
 /** @file\r
-  MSR Defintions for Intel Atom processors based on the Goldmont Plus microarchitecture.\r
+  MSR Definitions for Intel Atom processors based on the Goldmont Plus microarchitecture.\r
 \r
   Provides defines for Machine Specific Registers(MSR) indexes. Data structures\r
   are provided for MSRs that contain one or more bit fields.  If the MSR value\r

diff --git a/MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h b/MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h
index 30f96f0e82fa52039b785ba168435fbab78b0e65..03cac77c19a66e5ce285aab82c3654ed79d9f44f 100644 (file)
--- a/MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h
+++ b/MdePkg/Include/Register/Intel/Msr/SkylakeMsr.h
@@ -1,5 +1,5 @@
 /** @file\r
-  MSR Defintions for Intel processors based on the Skylake/Kabylake/Coffeelake/Cannonlake microarchitecture.\r
+  MSR Definitions for Intel processors based on the Skylake/Kabylake/Coffeelake/Cannonlake microarchitecture.\r
 \r
   Provides defines for Machine Specific Registers(MSR) indexes. Data structures\r
   are provided for MSRs that contain one or more bit fields.  If the MSR value\r

diff --git a/MdePkg/Include/Register/Intel/StmResourceDescriptor.h b/MdePkg/Include/Register/Intel/StmResourceDescriptor.h
index da4c91d0f4b814d3e63a1e580752ff0bff353e8d..3e426701e83c87b7c212892384cd4dea1a7cde6e 100644 (file)
--- a/MdePkg/Include/Register/Intel/StmResourceDescriptor.h
+++ b/MdePkg/Include/Register/Intel/StmResourceDescriptor.h
@@ -179,7 +179,7 @@ typedef struct {
 } STM_RSC_ALL_RESOURCES_DESC;\r
 \r
 /**\r
-  STM Register Volation Descriptor\r
+  STM Register Violation Descriptor\r
 **/\r
 typedef struct {\r
   STM_RSC_DESC_HEADER  Hdr;\r