runtime s3 boot Script. This header file is to definied PI SMM related definition to locate \r
SmmSaveState Protocol \r
\r
- Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
#ifndef _PI_SMM_DEFINITION_H_\r
#define _PI_SMM_DEFINITION_H_\r
\r
-typedef struct _EFI_SMM_CPU_IO_PROTOCOL EFI_SMM_CPU_IO_PROTOCOL;\r
+typedef struct _EFI_SMM_CPU_IO2_PROTOCOL EFI_SMM_CPU_IO2_PROTOCOL;\r
\r
///\r
/// Width of the SMM CPU I/O operations\r
The I/O operations are carried out exactly as requested. The caller is responsible for any alignment \r
and I/O width issues that the bus, device, platform, or type of I/O might require.\r
\r
- @param[in] This The EFI_SMM_CPU_IO_PROTOCOL instance.\r
+ @param[in] This The EFI_SMM_CPU_IO2_PROTOCOL instance.\r
@param[in] Width Signifies the width of the I/O operations.\r
@param[in] Address The base address of the I/O operations.\r
The caller is responsible for aligning the Address if required. \r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_SMM_CPU_IO2)(\r
- IN CONST EFI_SMM_CPU_IO_PROTOCOL *This,\r
+ IN CONST EFI_SMM_CPU_IO2_PROTOCOL *This,\r
IN EFI_SMM_IO_WIDTH Width,\r
IN UINT64 Address,\r
IN UINTN Count,\r
} EFI_SMM_IO_ACCESS2;\r
\r
///\r
-/// SMM CPU I/O Protocol provides CPU I/O and memory access within SMM.\r
+/// SMM CPU I/O 2 Protocol provides CPU I/O and memory access within SMM.\r
///\r
-struct _EFI_SMM_CPU_IO_PROTOCOL {\r
+struct _EFI_SMM_CPU_IO2_PROTOCOL {\r
EFI_SMM_IO_ACCESS2 Mem; ///< Allows reads and writes to memory-mapped I/O space.\r
EFI_SMM_IO_ACCESS2 Io; ///< Allows reads and writes to I/O space.\r
};\r
///\r
/// I/O Service\r
///\r
- EFI_SMM_CPU_IO_PROTOCOL SmmIo;\r
+ EFI_SMM_CPU_IO2_PROTOCOL SmmIo;\r
\r
///\r
/// Runtime memory services\r