The PCI Root bridge is defined by PciRoot(0x0)/Pci(0x0,0x0).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <Olivier.Martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17528
6f19259b-4bc3-4df7-8a09-
765794883524
\r
typedef struct {\r
ACPI_HID_DEVICE_PATH AcpiDevicePath;\r
+ PCI_DEVICE_PATH PciDevicePath;\r
EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;\r
\r
EISA_PNP_ID (0x0A03),\r
0\r
},\r
+ {\r
+ { HARDWARE_DEVICE_PATH,\r
+ HW_PCI_DP,\r
+ { (UINT8) (sizeof (PCI_DEVICE_PATH)),\r
+ (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) }\r
+ },\r
+ 0,\r
+ 0\r
+ },\r
{\r
END_DEVICE_PATH_TYPE,\r
END_ENTIRE_DEVICE_PATH_SUBTYPE,\r