OvmfPkg: split Include/OvmfPlatforms.h

Move platform specific macros to their own include files.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17432 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h b/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h
new file mode 100644 (file)
index 0000000..893bca4
--- /dev/null
+++ b/OvmfPkg/Include/IndustryStandard/I440FxPiix4.h
@@ -0,0 +1,35 @@
+/** @file\r
+  Various register numbers and value bits based on the following publications:\r
+  - Intel(R) datasheet 290549-001\r
+  - Intel(R) datasheet 290562-001\r
+  - Intel(R) datasheet 297654-006\r
+  - Intel(R) datasheet 297738-017\r
+\r
+  Copyright (C) 2015, Red Hat, Inc.\r
+  Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>\r
+\r
+  This program and the accompanying materials are licensed and made available\r
+  under the terms and conditions of the BSD License which accompanies this\r
+  distribution.   The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r
+  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __I440FX_PIIX4_H__\r
+#define __I440FX_PIIX4_H__\r
+\r
+#include <Library/PciLib.h>\r
+\r
+//\r
+// Host Bridge Device ID (DID) value for I440FX\r
+//\r
+#define INTEL_82441_DEVICE_ID 0x1237\r
+\r
+//\r
+// B/D/F/Type: 0/1/3/PCI\r
+//\r
+#define POWER_MGMT_REGISTER_PIIX4(Offset) PCI_LIB_ADDRESS (0, 1, 3, (Offset))\r
+\r
+#endif\r

diff --git a/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
new file mode 100644 (file)
index 0000000..91fb6e1
--- /dev/null
+++ b/OvmfPkg/Include/IndustryStandard/Q35MchIch9.h
@@ -0,0 +1,34 @@
+/** @file\r
+  Various register numbers and value bits based on the following publications:\r
+  - Intel(R) datasheet 316966-002\r
+  - Intel(R) datasheet 316972-004\r
+\r
+  Copyright (C) 2015, Red Hat, Inc.\r
+  Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>\r
+\r
+  This program and the accompanying materials are licensed and made available\r
+  under the terms and conditions of the BSD License which accompanies this\r
+  distribution.   The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r
+  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __Q35_MCH_ICH9_H__\r
+#define __Q35_MCH_ICH9_H__\r
+\r
+#include <Library/PciLib.h>\r
+\r
+//\r
+// Host Bridge Device ID (DID) value for Q35/MCH\r
+//\r
+#define INTEL_Q35_MCH_DEVICE_ID 0x29C0\r
+\r
+//\r
+// B/D/F/Type: 0/0x1f/0/PCI\r
+//\r
+#define POWER_MGMT_REGISTER_Q35(Offset) \\r
+  PCI_LIB_ADDRESS (0, 0x1f, 0, (Offset))\r
+\r
+#endif\r

diff --git a/OvmfPkg/Include/OvmfPlatforms.h b/OvmfPkg/Include/OvmfPlatforms.h
index cf6e62435c5bd7054a8fe72215cc53a095017046..19f0adb8976a75703bfd5191a2a4b38d9a673b84 100644 (file)
--- a/OvmfPkg/Include/OvmfPlatforms.h
+++ b/OvmfPkg/Include/OvmfPlatforms.h
@@ -1,6 +1,7 @@
 /** @file\r
   OVMF Platform definitions\r
 \r
+  Copyright (C) 2015, Red Hat, Inc.\r
   Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>\r
 \r
   This program and the accompanying materials are licensed and made\r
@@ -17,12 +18,8 @@
 \r
 #include <Library/PciLib.h>\r
 #include <IndustryStandard/Pci22.h>\r
-\r
-//\r
-// Host Bridge Device ID (DID) values for PIIX4 and Q35/MCH\r
-//\r
-#define INTEL_82441_DEVICE_ID     0x1237  // PIIX4\r
-#define INTEL_Q35_MCH_DEVICE_ID   0x29C0  // Q35\r
+#include <IndustryStandard/Q35MchIch9.h>\r
+#include <IndustryStandard/I440FxPiix4.h>\r
 \r
 //\r
 // OVMF Host Bridge DID Address\r
@@ -30,20 +27,4 @@
 #define OVMF_HOSTBRIDGE_DID \\r
   PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)\r
 \r
-//\r
-// Power Management Device and Function numbers for PIIX4 and Q35/MCH\r
-//\r
-#define OVMF_PM_DEVICE_PIIX4  0x01\r
-#define OVMF_PM_FUNC_PIIX4    0x03\r
-#define OVMF_PM_DEVICE_Q35    0x1f\r
-#define OVMF_PM_FUNC_Q35      0x00\r
-\r
-//\r
-// Power Management Register access for PIIX4 and Q35/MCH\r
-//\r
-#define POWER_MGMT_REGISTER_PIIX4(Offset) \\r
-  PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_PIIX4, OVMF_PM_FUNC_PIIX4, (Offset))\r
-#define POWER_MGMT_REGISTER_Q35(Offset) \\r
-  PCI_LIB_ADDRESS (0, OVMF_PM_DEVICE_Q35, OVMF_PM_FUNC_Q35, (Offset))\r
-\r
 #endif\r