spa->spa_alloc_count);
/*
- * The spa ashift values currently only reflect the
- * general vdev classes. Class destination is late
- * binding so ashift checking had to wait until now
+ * The spa ashift min/max only apply for the normal metaslab
+ * class. Class destination is late binding so ashift boundry
+ * setting had to wait until now.
*/
if (vd->vdev_top == vd && vd->vdev_ashift != 0 &&
mc == spa_normal_class(spa) && vd->vdev_aux == NULL) {
return (error);
}
- /*
- * Track the min and max ashift values for normal data devices.
- */
- if (vd->vdev_top == vd && vd->vdev_ashift != 0 &&
- vd->vdev_alloc_bias == VDEV_BIAS_NONE &&
- vd->vdev_islog == 0 && vd->vdev_aux == NULL) {
- if (vd->vdev_ashift > spa->spa_max_ashift)
- spa->spa_max_ashift = vd->vdev_ashift;
- if (vd->vdev_ashift < spa->spa_min_ashift)
- spa->spa_min_ashift = vd->vdev_ashift;
- }
-
/*
* If this is a leaf vdev, assess whether a resilver is needed.
* But don't do this if we are doing a reopen for a scrub, since
/*
* Copyright (c) 2005, 2010, Oracle and/or its affiliates. All rights reserved.
- * Copyright (c) 2011, 2019 by Delphix. All rights reserved.
+ * Copyright (c) 2011, 2020 by Delphix. All rights reserved.
* Copyright (c) 2019, loli10K <ezomori.nozomu@gmail.com>. All rights reserved.
*/
return (SET_ERROR(EINVAL));
}
+ /*
+ * A removed special/dedup vdev must have same ashift as normal class.
+ */
+ ASSERT(!vd->vdev_islog);
+ if (vd->vdev_alloc_bias != VDEV_BIAS_NONE &&
+ vd->vdev_ashift != spa->spa_max_ashift) {
+ return (SET_ERROR(EINVAL));
+ }
+
/*
* All vdevs in normal class must have the same ashift
* and not be raidz.
int num_indirect = 0;
for (uint64_t id = 0; id < rvd->vdev_children; id++) {
vdev_t *cvd = rvd->vdev_child[id];
- if (cvd->vdev_ashift != 0 && !cvd->vdev_islog)
+
+ /*
+ * A removed special/dedup vdev must have the same ashift
+ * across all vdevs in its class.
+ */
+ if (vd->vdev_alloc_bias != VDEV_BIAS_NONE &&
+ cvd->vdev_alloc_bias == vd->vdev_alloc_bias &&
+ cvd->vdev_ashift != vd->vdev_ashift) {
+ return (SET_ERROR(EINVAL));
+ }
+ if (cvd->vdev_ashift != 0 &&
+ cvd->vdev_alloc_bias == VDEV_BIAS_NONE)
ASSERT3U(cvd->vdev_ashift, ==, spa->spa_max_ashift);
if (cvd->vdev_ops == &vdev_indirect_ops)
num_indirect++;