]> git.proxmox.com Git - mirror_edk2.git/commitdiff
OvmfPkg: Copy Main.asm from UefiCpuPkg to OvmfPkg's ResetVector
authorMin Xu <min.m.xu@intel.com>
Thu, 23 Sep 2021 03:09:00 +0000 (11:09 +0800)
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Sun, 24 Oct 2021 02:09:27 +0000 (02:09 +0000)
RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429

Previously OvmfPkg/ResetVector uses the Main.asm in
UefiCpuPkg/ReseteVector/Vtf0. In this Main.asm there is only Main16
entry point.

This patch-set is to introduce Intel TDX into Ovmf. Main32 entry point
is needed in Main.asm by Intel TDX. To reduce the complexity of Main.asm
in UefiCpuPkg, OvmfPkg create its own Main.asm to meet the requirement
of Intel TDX. This Main.asm is an unmodified copy (so no functional
change) and the actual changes for tdx come as incremental patches.

UefiCpuPkg/ResetVector/Vtf0/main.asm -> OvmfPkg/ResetVector/Main.asm

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
OvmfPkg/ResetVector/Main.asm [new file with mode: 0644]

diff --git a/OvmfPkg/ResetVector/Main.asm b/OvmfPkg/ResetVector/Main.asm
new file mode 100644 (file)
index 0000000..ae90a14
--- /dev/null
@@ -0,0 +1,103 @@
+;------------------------------------------------------------------------------\r
+; @file\r
+; Main routine of the pre-SEC code up through the jump into SEC\r
+;\r
+; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>\r
+; SPDX-License-Identifier: BSD-2-Clause-Patent\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+\r
+BITS    16\r
+\r
+;\r
+; Modified:  EBX, ECX, EDX, EBP\r
+;\r
+; @param[in,out]  RAX/EAX  Initial value of the EAX register\r
+;                          (BIST: Built-in Self Test)\r
+; @param[in,out]  DI       'BP': boot-strap processor, or\r
+;                          'AP': application processor\r
+; @param[out]     RBP/EBP  Address of Boot Firmware Volume (BFV)\r
+; @param[out]     DS       Selector allowing flat access to all addresses\r
+; @param[out]     ES       Selector allowing flat access to all addresses\r
+; @param[out]     FS       Selector allowing flat access to all addresses\r
+; @param[out]     GS       Selector allowing flat access to all addresses\r
+; @param[out]     SS       Selector allowing flat access to all addresses\r
+;\r
+; @return         None  This routine jumps to SEC and does not return\r
+;\r
+Main16:\r
+    OneTimeCall EarlyInit16\r
+\r
+    ;\r
+    ; Transition the processor from 16-bit real mode to 32-bit flat mode\r
+    ;\r
+    OneTimeCall TransitionFromReal16To32BitFlat\r
+\r
+BITS    32\r
+\r
+    ;\r
+    ; Search for the Boot Firmware Volume (BFV)\r
+    ;\r
+    OneTimeCall Flat32SearchForBfvBase\r
+\r
+    ;\r
+    ; EBP - Start of BFV\r
+    ;\r
+\r
+    ;\r
+    ; Search for the SEC entry point\r
+    ;\r
+    OneTimeCall Flat32SearchForSecEntryPoint\r
+\r
+    ;\r
+    ; ESI - SEC Core entry point\r
+    ; EBP - Start of BFV\r
+    ;\r
+\r
+%ifdef ARCH_IA32\r
+\r
+    ;\r
+    ; Restore initial EAX value into the EAX register\r
+    ;\r
+    mov     eax, esp\r
+\r
+    ;\r
+    ; Jump to the 32-bit SEC entry point\r
+    ;\r
+    jmp     esi\r
+\r
+%else\r
+\r
+    ;\r
+    ; Transition the processor from 32-bit flat mode to 64-bit flat mode\r
+    ;\r
+    OneTimeCall Transition32FlatTo64Flat\r
+\r
+BITS    64\r
+\r
+    ;\r
+    ; Some values were calculated in 32-bit mode.  Make sure the upper\r
+    ; 32-bits of 64-bit registers are zero for these values.\r
+    ;\r
+    mov     rax, 0x00000000ffffffff\r
+    and     rsi, rax\r
+    and     rbp, rax\r
+    and     rsp, rax\r
+\r
+    ;\r
+    ; RSI - SEC Core entry point\r
+    ; RBP - Start of BFV\r
+    ;\r
+\r
+    ;\r
+    ; Restore initial EAX value into the RAX register\r
+    ;\r
+    mov     rax, rsp\r
+\r
+    ;\r
+    ; Jump to the 64-bit SEC entry point\r
+    ;\r
+    jmp     rsi\r
+\r
+%endif\r