MdePkg/Register/Amd: define GHCB macro for Register GPA structure

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275

An SEV-SNP guest is required to perform the GHCB GPA registration. See
the GHCB specification for further details.

Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>
Reviewed-by: Erdem Aktas <erdemaktas@google.com>
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Message-Id: <20210519181949.6574-5-brijesh.singh@amd.com>

diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h b/MdePkg/Include/Register/Amd/Fam17Msr.h
index cdb8f588ccf8677e90c5bb0e77da58806d1ae03e..542e4cdf4782c3d6a6be350f4a2a012aafc41fab 100644 (file)
--- a/MdePkg/Include/Register/Amd/Fam17Msr.h
+++ b/MdePkg/Include/Register/Amd/Fam17Msr.h
@@ -53,6 +53,11 @@ typedef union {
     UINT64  Features:52;\r
   } GhcbHypervisorFeatures;\r
 \r
+  struct {\r
+    UINT64  Function:12;\r
+    UINT64  GuestFrameNumber:52;\r
+  } GhcbGpaRegister;\r
+\r
   VOID    *Ghcb;\r
 \r
   UINT64  GhcbPhysicalAddress;\r
@@ -62,6 +67,8 @@ typedef union {
 #define GHCB_INFO_SEV_INFO_GET                      2\r
 #define GHCB_INFO_CPUID_REQUEST                     4\r
 #define GHCB_INFO_CPUID_RESPONSE                    5\r
+#define GHCB_INFO_GHCB_GPA_REGISTER_REQUEST         18\r
+#define GHCB_INFO_GHCB_GPA_REGISTER_RESPONSE        19\r
 #define GHCB_HYPERVISOR_FEATURES_REQUEST            128\r
 #define GHCB_HYPERVISOR_FEATURES_RESPONSE           129\r
 #define GHCB_INFO_TERMINATE_REQUEST                 256\r