Ihis library is only intended to be used by TPM modules.\r
It provides basic TPM Interface Specification (TIS) and Command functions.\r
\r
-Copyright (c) 2005 - 2011, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
//\r
// Default TimeOut value\r
//\r
+#define TIS_TIMEOUT_A 750 * 1000 // 750ms\r
#define TIS_TIMEOUT_B 2000 * 1000 // 2s\r
#define TIS_TIMEOUT_C 750 * 1000 // 750ms\r
#define TIS_TIMEOUT_D 750 * 1000 // 750ms\r
/** @file\r
Basic TIS (TPM Interface Specification) functions.\r
\r
-Copyright (c) 2005 - 2011, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
\r
/**\r
Get the control of TPM chip by sending requestUse command TIS_PC_ACC_RQUUSE \r
- to ACCESS Register in the time of default TIS_TIMEOUT_D.\r
+ to ACCESS Register in the time of default TIS_TIMEOUT_A.\r
\r
@param[in] TisReg Pointer to TIS register.\r
\r
}\r
\r
MmioWrite8((UINTN)&TisReg->Access, TIS_PC_ACC_RQUUSE);\r
+ //\r
+ // No locality set before, ACCESS_X.activeLocality MUST be valid within TIMEOUT_A\r
+ //\r
Status = TisPcWaitRegisterBits (\r
&TisReg->Access,\r
(UINT8)(TIS_PC_ACC_ACTIVE |TIS_PC_VALID),\r
0,\r
- TIS_TIMEOUT_D\r
+ TIS_TIMEOUT_A\r
);\r
return Status;\r
}\r