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numa: Skip invalidation of cluster and NUMA node boundary for qtest
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2024-01-11 Peter MaydellMerge tag 'firmware/edk2-20231213-pull-request' of...
2024-01-11 Peter MaydellMerge tag 'pull-loongarch-20240111' of https://gitlab...
2024-01-11 Bibo Maohw/loongarch/virt: Set iocsr address space per-board...
2024-01-11 Tianrui Zhaotarget/loongarch: Add loongarch kvm into meson build
2024-01-11 Tianrui Zhaotarget/loongarch: Implement set vcpu intr for kvm
2024-01-11 Tianrui Zhaotarget/loongarch: Restrict TCG-specific code
2024-01-11 Tianrui Zhaotarget/loongarch: Implement kvm_arch_handle_exit
2024-01-11 Tianrui Zhaotarget/loongarch: Implement kvm_arch_init_vcpu
2024-01-11 Tianrui Zhaotarget/loongarch: Implement kvm_arch_init function
2024-01-11 Tianrui Zhaotarget/loongarch: Implement kvm get/set registers
2024-01-11 Tianrui Zhaotarget/loongarch: Supplement vcpu env initial when...
2024-01-11 Tianrui Zhaotarget/loongarch: Define some kvm_arch interfaces
2024-01-11 Peter MaydellMerge tag 'pull-target-arm-20240111' of https://git...
2024-01-10 Peter MaydellMerge tag 'pull-riscv-to-apply-20240110' of https:...
2024-01-10 Alistair Francistarget/riscv: Ensure mideleg is set correctly on reset
2024-01-10 Alistair Francistarget/riscv: Don't adjust vscause for exceptions
2024-01-10 Alistair Francistarget/riscv: Assert that the CSR numbers will be correct
2024-01-10 Ivan Klokovtarget/riscv: pmp: Ignore writes when RW=01 and MML=0
2024-01-10 Daniel Henrique... target/riscv/kvm: add RVV and Vector CSR regs
2024-01-10 Daniel Henrique... target/riscv/kvm: do PR_RISCV_V_SET_CONTROL during...
2024-01-10 Yong-Xuan Wangtarget/riscv/kvm.c: remove group setting of KVM AIA...
2024-01-10 Daniel Henrique... target/riscv: add rva22s64 cpu
2024-01-10 Daniel Henrique... target/riscv: add RVA22S64 profile
2024-01-10 Daniel Henrique... target/riscv: add 'parent' in profile description
2024-01-10 Daniel Henrique... target/riscv: add satp_mode profile support
2024-01-10 Daniel Henrique... target/riscv/cpu.c: add riscv_cpu_is_32bit()
2024-01-10 Daniel Henrique... target/riscv/cpu.c: finalize satp_mode earlier
2024-01-10 Daniel Henrique... target/riscv: add priv ver restriction to profiles
2024-01-10 Daniel Henrique... target/riscv: implement svade
2024-01-10 Daniel Henrique... target/riscv: add 'rva22u64' CPU
2024-01-10 Daniel Henrique... riscv-qmp-cmds.c: add profile flags in cpu-model-expansion
2024-01-10 Daniel Henrique... target/riscv/tcg: validate profiles during finalize
2024-01-10 Daniel Henrique... target/riscv/tcg: honor user choice for G MISA bits
2024-01-10 Daniel Henrique... target/riscv/tcg: add hash table insert helpers
2024-01-10 Daniel Henrique... target/riscv/tcg: handle profile MISA bits
2024-01-10 Daniel Henrique... target/riscv/tcg: add riscv_cpu_write_misa_bit()
2024-01-10 Daniel Henrique... target/riscv/tcg: add MISA user options hash
2024-01-10 Daniel Henrique... target/riscv/tcg: add user flag for profile support
2024-01-10 Daniel Henrique... target/riscv/kvm: add 'rva22u64' flag as unavailable
2024-01-10 Daniel Henrique... target/riscv: add rva22u64 profile definition
2024-01-10 Daniel Henrique... riscv-qmp-cmds.c: expose named features in cpu_model_ex...
2024-01-10 Daniel Henrique... target/riscv/tcg: add 'zic64b' support
2024-01-10 Daniel Henrique... target/riscv: add zicbop extension flag
2024-01-10 Daniel Henrique... target/riscv: add rv64i CPU
2024-01-10 Daniel Henrique... target/riscv/tcg: update priv_ver on user_set extensions
2024-01-10 Daniel Henrique... target/riscv/tcg: do not use "!generic" CPU checks
2024-01-10 Daniel Henrique... target/riscv: create TYPE_RISCV_VENDOR_CPU
2024-01-10 Weiwei Litarget/riscv: Add support for Zacas extension
2024-01-10 Daniel Henrique... target/riscv/kvm: rename riscv_reg_id() to riscv_reg_id...
2024-01-10 Daniel Henrique... target/riscv/kvm: add RISCV_CONFIG_REG()
2024-01-10 Daniel Henrique... target/riscv/kvm: change timer regs size to u64
2024-01-10 Daniel Henrique... target/riscv/kvm: change KVM_REG_RISCV_FP_D to u64
2024-01-10 Daniel Henrique... target/riscv/kvm: change KVM_REG_RISCV_FP_F to u32
2024-01-10 Daniel Henrique... target/riscv/cpu.c: fix machine IDs getters
2024-01-10 Ivan Klokovtarget/riscv/pmp: Use hwaddr instead of target_ulong...
2024-01-10 LIU Zhiweitarget/riscv: Not allow write mstatus_vs without RVV
2024-01-10 LIU Zhiweitarget/riscv: Fix th.dcache.cval1 priviledge check
2024-01-10 Max Choutarget/riscv: The whole vector register move instructio...
2024-01-10 Max Choutarget/riscv: Add vill check for whole vector register...
2024-01-09 Peter Maydelltarget/arm: Add FEAT_NV2 to max, neoverse-n2, neoverse...
2024-01-09 Peter Maydelltarget/arm: Enhance CPU_LOG_INT to show SPSR on AArch64...
2024-01-09 Peter Maydelltarget/arm: Report HCR_EL2.{NV,NV1,NV2} in cpu dumps
2024-01-09 Peter Maydelltarget/arm: Mark up VNCR offsets (offsets >= 0x200...
2024-01-09 Peter Maydelltarget/arm: Mark up VNCR offsets (offsets 0x168..0x1f8)
2024-01-09 Peter Maydelltarget/arm: Mark up VNCR offsets (offsets 0x100..0x160)
2024-01-09 Peter Maydelltarget/arm: Mark up VNCR offsets (offsets 0x0..0xff)
2024-01-09 Peter Maydelltarget/arm: Report VNCR_EL2 based faults correctly
2024-01-09 Peter Maydelltarget/arm: Implement FEAT_NV2 redirection of sysregs...
2024-01-09 Peter Maydelltarget/arm: Handle FEAT_NV2 redirection of SPSR_EL2...
2024-01-09 Peter Maydelltarget/arm: Handle FEAT_NV2 changes to when SPSR_EL1...
2024-01-09 Peter Maydelltarget/arm: Implement VNCR_EL2 register
2024-01-09 Peter Maydelltarget/arm: Handle HCR_EL2 accesses for FEAT_NV2 bits
2024-01-09 Peter Maydelltarget/arm: Add FEAT_NV to max, neoverse-n2, neoverse...
2024-01-09 Peter Maydelltarget/arm: Handle FEAT_NV page table attribute changes
2024-01-09 Peter Maydelltarget/arm: Treat LDTR* and STTR* as LDR/STR when NV...
2024-01-09 Peter Maydelltarget/arm: Don't honour PSTATE.PAN when HCR_EL2.{NV...
2024-01-09 Peter Maydelltarget/arm: Always use arm_pan_enabled() when checking...
2024-01-09 Peter Maydelltarget/arm: Trap registers when HCR_EL2.{NV, NV1} ...
2024-01-09 Peter Maydelltarget/arm: Set SPSR_EL1.M correctly when nested virt...
2024-01-09 Peter Maydelltarget/arm: Make NV reads of CurrentEL return EL2
2024-01-09 Peter Maydelltarget/arm: Trap sysreg accesses for FEAT_NV
2024-01-09 Peter Maydelltarget/arm: Move FPU/SVE/SME access checks up above...
2024-01-09 Peter Maydelltarget/arm: Make EL2 cpreg accessfns safe for FEAT_NV...
2024-01-09 Peter Maydelltarget/arm: *_EL12 registers should UNDEF when HCR_EL2...
2024-01-09 Peter Maydelltarget/arm: Record correct opcode fields in cpreg for...
2024-01-09 Peter Maydelltarget/arm: Allow use of upper 32 bits of TBFLAG_A64
2024-01-09 Peter Maydelltarget/arm: Always honour HCR_EL2.TSC when HCR_EL2...
2024-01-09 Peter Maydelltarget/arm: Enable trapping of ERET for FEAT_NV
2024-01-09 Peter Maydelltarget/arm: Implement HCR_EL2.AT handling
2024-01-09 Peter Maydelltarget/arm: Handle HCR_EL2 accesses for bits introduced...
2024-01-09 Peter Maydelltarget/arm: Set CTR_EL0.{IDC,DIC} for the 'max' CPU
2024-01-09 Peter MaydellMerge tag 'block-pull-request' of https://gitlab.com...
2024-01-09 Peter MaydellMerge tag 'pull-replay-fixes-080124-1' of https://gitla...
2024-01-08 Stefan HajnocziReplace "iothread lock" with "BQL" in comments
2024-01-08 Stefan Hajnocziqemu/main-loop: rename qemu_cond_wait_iothread() to...
2024-01-08 Stefan Hajnocziqemu/main-loop: rename QEMU_IOTHREAD_LOCK_GUARD to...
2024-01-08 Stefan Hajnoczisystem/cpus: rename qemu_mutex_lock_iothread() to bql_l...
2024-01-08 Peter MaydellMerge tag 'pull-vfio-20240107' of https://github.com...
2024-01-08 Peter MaydellMerge tag 'pull-trivial-patches' of https://gitlab...
2024-01-08 Peter MaydellMerge tag 'pull-loongarch-20240106' of https://gitlab...
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