[ceph.git] / ceph / src / erasure-code / isa / isa-l / erasure_code / gf_2vect_mad_avx.asm.s

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
;
;  Redistribution and use in source and binary forms, with or without
;  modification, are permitted provided that the following conditions
;  are met:
;    * Redistributions of source code must retain the above copyright
;      notice, this list of conditions and the following disclaimer.
;    * Redistributions in binary form must reproduce the above copyright
;      notice, this list of conditions and the following disclaimer in
;      the documentation and/or other materials provided with the
;      distribution.
;    * Neither the name of Intel Corporation nor the names of its
;      contributors may be used to endorse or promote products derived
;      from this software without specific prior written permission.
;
;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

;;;
;;; gf_2vect_mad_avx(len, vec, vec_i, mul_array, src, dest);
;;;

%include "reg_sizes.asm"

%define PS 8

%ifidn __OUTPUT_FORMAT__, win64
 %define arg0  rcx
 %define arg0.w ecx
 %define arg1  rdx
 %define arg2  r8
 %define arg3  r9
 %define arg4  r12
 %define arg5  r15
 %define tmp   r11
 %define tmp2   r10
 %define return rax
 %define return.w eax
 %define stack_size 16*9 + 3*8
 %define arg(x)      [rsp + stack_size + PS + PS*x]
 %define func(x) proc_frame x

%macro FUNC_SAVE 0
	sub	rsp, stack_size
	movdqa	[rsp+16*0],xmm6
	movdqa	[rsp+16*1],xmm7
	movdqa	[rsp+16*2],xmm8
	movdqa	[rsp+16*3],xmm9
	movdqa	[rsp+16*4],xmm10
	movdqa	[rsp+16*5],xmm11
	movdqa	[rsp+16*6],xmm12
	movdqa	[rsp+16*7],xmm13
	movdqa	[rsp+16*8],xmm14
	save_reg	r12,  9*16 + 0*8
	save_reg	r15,  9*16 + 1*8
	end_prolog
	mov	arg4, arg(4)
	mov	arg5, arg(5)
%endmacro

%macro FUNC_RESTORE 0
	movdqa	xmm6, [rsp+16*0]
	movdqa	xmm7, [rsp+16*1]
	movdqa	xmm8, [rsp+16*2]
	movdqa	xmm9, [rsp+16*3]
	movdqa	xmm10, [rsp+16*4]
	movdqa	xmm11, [rsp+16*5]
	movdqa	xmm12, [rsp+16*6]
	movdqa	xmm13, [rsp+16*7]
	movdqa	xmm14, [rsp+16*8]
	mov	r12,  [rsp + 9*16 + 0*8]
	mov	r15,  [rsp + 9*16 + 1*8]
	add	rsp, stack_size
%endmacro

%elifidn __OUTPUT_FORMAT__, elf64
 %define arg0  rdi
 %define arg0.w edi
 %define arg1  rsi
 %define arg2  rdx
 %define arg3  rcx
 %define arg4  r8
 %define arg5  r9
 %define tmp   r11
 %define tmp2   r10
 %define return rax
 %define return.w eax

 %define func(x) x:
 %define FUNC_SAVE
 %define FUNC_RESTORE
%endif

;;; gf_2vect_mad_avx(len, vec, vec_i, mul_array, src, dest)
%define len   arg0
%define len.w arg0.w
%define vec    arg1
%define vec_i    arg2
%define mul_array arg3
%define	src   arg4
%define dest1 arg5
%define pos   return
%define pos.w return.w

%define dest2 tmp2

%ifndef EC_ALIGNED_ADDR
;;; Use Un-aligned load/store
 %define XLDR vmovdqu
 %define XSTR vmovdqu
%else
;;; Use Non-temporal load/stor
 %ifdef NO_NT_LDST
  %define XLDR vmovdqa
  %define XSTR vmovdqa
 %else
  %define XLDR vmovntdqa
  %define XSTR vmovntdq
 %endif
%endif


default rel

[bits 64]
section .text

%define xmask0f  xmm14
%define xgft1_lo  xmm13
%define xgft1_hi  xmm12
%define xgft2_lo  xmm11
%define xgft2_hi  xmm10

%define x0      xmm0
%define xtmpa   xmm1
%define xtmph1  xmm2
%define xtmpl1  xmm3
%define xtmph2  xmm4
%define xtmpl2  xmm5
%define xd1     xmm6
%define xd2     xmm7
%define xtmpd1  xmm8
%define xtmpd2  xmm9


align 16
global gf_2vect_mad_avx:function

func(gf_2vect_mad_avx)
	FUNC_SAVE
	sub	len, 16
	jl	.return_fail

	xor	pos, pos
	vmovdqa	xmask0f, [mask0f]	;Load mask of lower nibble in each byte
	sal	vec_i, 5		;Multiply by 32
	sal	vec, 5
	lea	tmp, [mul_array + vec_i]
	vmovdqu	xgft1_lo, [tmp]		;Load array Ax{00}, Ax{01}, Ax{02}, ...
	vmovdqu	xgft1_hi, [tmp+16]	; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
	vmovdqu	xgft2_lo, [tmp+vec]	;Load array Bx{00}, Bx{01}, Bx{02}, ...
	vmovdqu	xgft2_hi, [tmp+vec+16]	; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}

	mov	dest2, [dest1+PS]
	mov	dest1, [dest1]

	XLDR	xtmpd1, [dest1+len]	;backup the last 16 bytes in dest
	XLDR	xtmpd2, [dest2+len]	;backup the last 16 bytes in dest

.loop16
	XLDR	xd1, [dest1+pos]		;Get next dest vector
	XLDR	xd2, [dest2+pos]		;Get next dest vector
.loop16_overlap:
	XLDR	x0, [src+pos]		;Get next source vector

	vpand	xtmpa, x0, xmask0f	;Mask low src nibble in bits 4-0
	vpsraw	x0, x0, 4		;Shift to put high nibble into bits 4-0
	vpand	x0, x0, xmask0f		;Mask high src nibble in bits 4-0

	vpshufb	xtmph1, xgft1_hi, x0	;Lookup mul table of high nibble
	vpshufb	xtmpl1, xgft1_lo, xtmpa	;Lookup mul table of low nibble
	vpxor	xtmph1, xtmph1, xtmpl1 ;GF add high and low partials
	vpxor	xd1, xd1, xtmph1	;xd1 += partial

	vpshufb	xtmph2, xgft2_hi, x0	;Lookup mul table of high nibble
	vpshufb	xtmpl2, xgft2_lo, xtmpa	;Lookup mul table of low nibble
	vpxor	xtmph2, xtmph2, xtmpl2 ;GF add high and low partials
	vpxor	xd2, xd2, xtmph2	;xd2 += partial

	XSTR	[dest1+pos], xd1
	XSTR	[dest2+pos], xd2

	add	pos, 16			;Loop on 16 bytes at a time
	cmp	pos, len
	jle	.loop16

	lea	tmp, [len + 16]
	cmp	pos, tmp
	je	.return_pass

	;; Tail len
	mov	pos, len	;Overlapped offset length-16
	vmovdqa	xd1, xtmpd1	;Restore xd1
	vmovdqa	xd2, xtmpd2	;Restore xd2
	jmp	.loop16_overlap	;Do one more overlap pass

.return_pass:
	mov	return, 0
	FUNC_RESTORE
	ret

.return_fail:
	mov	return, 1
	FUNC_RESTORE
	ret

endproc_frame

section .data

align 16
mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f

;;;       func             core, ver, snum
slversion gf_2vect_mad_avx, 02,  01,  0204
Commit	Line	Data
7c673cae FG	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
	2	; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
	3	;
	4	; Redistribution and use in source and binary forms, with or without
	5	; modification, are permitted provided that the following conditions
	6	; are met:
	7	; * Redistributions of source code must retain the above copyright
	8	; notice, this list of conditions and the following disclaimer.
	9	; * Redistributions in binary form must reproduce the above copyright
	10	; notice, this list of conditions and the following disclaimer in
	11	; the documentation and/or other materials provided with the
	12	; distribution.
	13	; * Neither the name of Intel Corporation nor the names of its
	14	; contributors may be used to endorse or promote products derived
	15	; from this software without specific prior written permission.
	16	;
	17	; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	18	; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	19	; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
	20	; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	21	; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
	22	; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
	23	; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
	24	; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
	25	; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	26	; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	27	; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	28	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
	29
	30	;;;
	31	;;; gf_2vect_mad_avx(len, vec, vec_i, mul_array, src, dest);
	32	;;;
	33
	34	%include "reg_sizes.asm"
	35
	36	%define PS 8
	37
	38	%ifidn __OUTPUT_FORMAT__, win64
	39	%define arg0 rcx
	40	%define arg0.w ecx
	41	%define arg1 rdx
	42	%define arg2 r8
	43	%define arg3 r9
	44	%define arg4 r12
	45	%define arg5 r15
	46	%define tmp r11
	47	%define tmp2 r10
	48	%define return rax
	49	%define return.w eax
	50	%define stack_size 169 + 38
	51	%define arg(x) [rsp + stack_size + PS + PS*x]
	52	%define func(x) proc_frame x
	53
	54	%macro FUNC_SAVE 0
	55	sub rsp, stack_size
	56	movdqa [rsp+16*0],xmm6
	57	movdqa [rsp+16*1],xmm7
	58	movdqa [rsp+16*2],xmm8
	59	movdqa [rsp+16*3],xmm9
	60	movdqa [rsp+16*4],xmm10
	61	movdqa [rsp+16*5],xmm11
	62	movdqa [rsp+16*6],xmm12
	63	movdqa [rsp+16*7],xmm13
	64	movdqa [rsp+16*8],xmm14
65	save_reg r12, 916 + 08
66	save_reg r15, 916 + 18
67	end_prolog
68	mov arg4, arg(4)
69	mov arg5, arg(5)
70	%endmacro
71
72	%macro FUNC_RESTORE 0
73	movdqa xmm6, [rsp+16*0]
74	movdqa xmm7, [rsp+16*1]
75	movdqa xmm8, [rsp+16*2]
76	movdqa xmm9, [rsp+16*3]
77	movdqa xmm10, [rsp+16*4]
78	movdqa xmm11, [rsp+16*5]
79	movdqa xmm12, [rsp+16*6]
80	movdqa xmm13, [rsp+16*7]
81	movdqa xmm14, [rsp+16*8]
82	mov r12, [rsp + 916 + 08]
83	mov r15, [rsp + 916 + 18]
84	add rsp, stack_size
85	%endmacro
86
87	%elifidn __OUTPUT_FORMAT__, elf64
88	%define arg0 rdi
89	%define arg0.w edi
90	%define arg1 rsi
91	%define arg2 rdx
92	%define arg3 rcx
93	%define arg4 r8
94	%define arg5 r9
95	%define tmp r11
96	%define tmp2 r10
97	%define return rax
98	%define return.w eax
99
100	%define func(x) x:
101	%define FUNC_SAVE
102	%define FUNC_RESTORE
103	%endif
104
105	;;; gf_2vect_mad_avx(len, vec, vec_i, mul_array, src, dest)
106	%define len arg0
107	%define len.w arg0.w
108	%define vec arg1
109	%define vec_i arg2
110	%define mul_array arg3
111	%define src arg4
112	%define dest1 arg5
113	%define pos return
114	%define pos.w return.w
115
116	%define dest2 tmp2
117
118	%ifndef EC_ALIGNED_ADDR
119	;;; Use Un-aligned load/store
120	%define XLDR vmovdqu
121	%define XSTR vmovdqu
122	%else
123	;;; Use Non-temporal load/stor
124	%ifdef NO_NT_LDST
125	%define XLDR vmovdqa
126	%define XSTR vmovdqa
127	%else
128	%define XLDR vmovntdqa
129	%define XSTR vmovntdq
130	%endif
131	%endif
132
133
134	default rel
135
136	[bits 64]
137	section .text
138
139	%define xmask0f xmm14
140	%define xgft1_lo xmm13
141	%define xgft1_hi xmm12
142	%define xgft2_lo xmm11
143	%define xgft2_hi xmm10
144
145	%define x0 xmm0
146	%define xtmpa xmm1
147	%define xtmph1 xmm2
148	%define xtmpl1 xmm3
149	%define xtmph2 xmm4
150	%define xtmpl2 xmm5
151	%define xd1 xmm6
152	%define xd2 xmm7
153	%define xtmpd1 xmm8
154	%define xtmpd2 xmm9
155
156
157	align 16
158	global gf_2vect_mad_avx:function
159
160	func(gf_2vect_mad_avx)
161	FUNC_SAVE
162	sub len, 16
163	jl .return_fail
164
165	xor pos, pos
166	vmovdqa xmask0f, [mask0f] ;Load mask of lower nibble in each byte
167	sal vec_i, 5 ;Multiply by 32
168	sal vec, 5
169	lea tmp, [mul_array + vec_i]
170	vmovdqu xgft1_lo, [tmp] ;Load array Ax{00}, Ax{01}, Ax{02}, ...
171	vmovdqu xgft1_hi, [tmp+16] ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
172	vmovdqu xgft2_lo, [tmp+vec] ;Load array Bx{00}, Bx{01}, Bx{02}, ...
173	vmovdqu xgft2_hi, [tmp+vec+16] ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
174
175	mov dest2, [dest1+PS]
176	mov dest1, [dest1]
177
178	XLDR xtmpd1, [dest1+len] ;backup the last 16 bytes in dest
179	XLDR xtmpd2, [dest2+len] ;backup the last 16 bytes in dest
180
181	.loop16
182	XLDR xd1, [dest1+pos] ;Get next dest vector
183	XLDR xd2, [dest2+pos] ;Get next dest vector
184	.loop16_overlap:
185	XLDR x0, [src+pos] ;Get next source vector
186
187	vpand xtmpa, x0, xmask0f ;Mask low src nibble in bits 4-0
188	vpsraw x0, x0, 4 ;Shift to put high nibble into bits 4-0
189	vpand x0, x0, xmask0f ;Mask high src nibble in bits 4-0
190
191	vpshufb xtmph1, xgft1_hi, x0 ;Lookup mul table of high nibble
192	vpshufb xtmpl1, xgft1_lo, xtmpa ;Lookup mul table of low nibble
193	vpxor xtmph1, xtmph1, xtmpl1 ;GF add high and low partials
194	vpxor xd1, xd1, xtmph1 ;xd1 += partial
195
196	vpshufb xtmph2, xgft2_hi, x0 ;Lookup mul table of high nibble
197	vpshufb xtmpl2, xgft2_lo, xtmpa ;Lookup mul table of low nibble
198	vpxor xtmph2, xtmph2, xtmpl2 ;GF add high and low partials
199	vpxor xd2, xd2, xtmph2 ;xd2 += partial
200
201	XSTR [dest1+pos], xd1
202	XSTR [dest2+pos], xd2
203
204	add pos, 16 ;Loop on 16 bytes at a time
205	cmp pos, len
206	jle .loop16
207
208	lea tmp, [len + 16]
209	cmp pos, tmp
210	je .return_pass
211
212	;; Tail len
213	mov pos, len ;Overlapped offset length-16
214	vmovdqa xd1, xtmpd1 ;Restore xd1
215	vmovdqa xd2, xtmpd2 ;Restore xd2
216	jmp .loop16_overlap ;Do one more overlap pass
217
218	.return_pass:
219	mov return, 0
220	FUNC_RESTORE
221	ret
222
223	.return_fail:
224	mov return, 1
225	FUNC_RESTORE
226	ret
227
228	endproc_frame
229
230	section .data
231
232	align 16
233	mask0f: ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
234
235	;;; func core, ver, snum
236	slversion gf_2vect_mad_avx, 02, 01, 0204