[ceph.git] / ceph / src / erasure-code / isa / isa-l / erasure_code / gf_3vect_mad_sse.asm.s

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;  Copyright(c) 2011-2015 Intel Corporation All rights reserved.
;
;  Redistribution and use in source and binary forms, with or without
;  modification, are permitted provided that the following conditions
;  are met:
;    * Redistributions of source code must retain the above copyright
;      notice, this list of conditions and the following disclaimer.
;    * Redistributions in binary form must reproduce the above copyright
;      notice, this list of conditions and the following disclaimer in
;      the documentation and/or other materials provided with the
;      distribution.
;    * Neither the name of Intel Corporation nor the names of its
;      contributors may be used to endorse or promote products derived
;      from this software without specific prior written permission.
;
;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

;;;
;;; gf_3vect_mad_sse(len, vec, vec_i, mul_array, src, dest);
;;;

%include "reg_sizes.asm"

%define PS 8
%ifidn __OUTPUT_FORMAT__, win64
 %define arg0  rcx
 %define arg0.w ecx
 %define arg1  rdx
 %define arg2  r8
 %define arg3  r9
 %define arg4  r12
 %define arg5  r15
 %define tmp   r11
 %define return rax
 %define return.w eax
 %define stack_size 16*10 + 3*8
 %define arg(x)      [rsp + stack_size + PS + PS*x]
 %define func(x) proc_frame x

%macro FUNC_SAVE 0
	sub	rsp, stack_size
	movdqa	[rsp+16*0],xmm6
	movdqa	[rsp+16*1],xmm7
	movdqa	[rsp+16*2],xmm8
	movdqa	[rsp+16*3],xmm9
	movdqa	[rsp+16*4],xmm10
	movdqa	[rsp+16*5],xmm11
	movdqa	[rsp+16*6],xmm12
	movdqa	[rsp+16*7],xmm13
	movdqa	[rsp+16*8],xmm14
	movdqa	[rsp+16*9],xmm15
	save_reg	r12,  10*16 + 0*8
	save_reg	r15,  10*16 + 1*8
	end_prolog
	mov	arg4, arg(4)
	mov	arg5, arg(5)
%endmacro

%macro FUNC_RESTORE 0
	movdqa	xmm6, [rsp+16*0]
	movdqa	xmm7, [rsp+16*1]
	movdqa	xmm8, [rsp+16*2]
	movdqa	xmm9, [rsp+16*3]
	movdqa	xmm10, [rsp+16*4]
	movdqa	xmm11, [rsp+16*5]
	movdqa	xmm12, [rsp+16*6]
	movdqa	xmm13, [rsp+16*7]
	movdqa	xmm14, [rsp+16*8]
	movdqa	xmm15, [rsp+16*9]
	mov	r12,  [rsp + 10*16 + 0*8]
	mov	r15,  [rsp + 10*16 + 1*8]
	add	rsp, stack_size
%endmacro

%elifidn __OUTPUT_FORMAT__, elf64
 %define arg0  rdi
 %define arg0.w edi
 %define arg1  rsi
 %define arg2  rdx
 %define arg3  rcx
 %define arg4  r8
 %define arg5  r9
 %define tmp   r11
 %define return rax
 %define return.w eax

 %define func(x) x:
 %define FUNC_SAVE
 %define FUNC_RESTORE
%endif

;;; gf_3vect_mad_sse(len, vec, vec_i, mul_array, src, dest)
%define len   arg0
%define len.w arg0.w
%define vec    arg1
%define vec_i    arg2
%define mul_array arg3
%define	src   arg4
%define dest1  arg5
%define pos   return
%define pos.w return.w

%define dest2 mul_array
%define dest3 vec_i

%ifndef EC_ALIGNED_ADDR
;;; Use Un-aligned load/store
 %define XLDR movdqu
 %define XSTR movdqu
%else
;;; Use Non-temporal load/stor
 %ifdef NO_NT_LDST
  %define XLDR movdqa
  %define XSTR movdqa
 %else
  %define XLDR movntdqa
  %define XSTR movntdq
 %endif
%endif

default rel

[bits 64]
section .text

%define xmask0f  xmm15
%define xgft1_lo  xmm14
%define xgft1_hi  xmm13
%define xgft2_lo  xmm12
%define xgft2_hi  xmm11
%define xgft3_lo  xmm10
%define xgft3_hi  xmm9

%define x0      xmm0
%define xtmpa   xmm1
%define xtmph1  xmm2
%define xtmpl1  xmm3
%define xtmph2  xmm4
%define xtmpl2  xmm5
%define xtmph3  xmm6
%define xtmpl3  xmm7
%define xd1     xmm8
%define xd2     xtmpl1
%define xd3     xtmph1

align 16
global gf_3vect_mad_sse:function
func(gf_3vect_mad_sse)
	FUNC_SAVE
	sub	len, 16
	jl	.return_fail
	xor	pos, pos
	movdqa	xmask0f, [mask0f]	;Load mask of lower nibble in each byte
	sal	vec_i, 5		;Multiply by 32
	sal	vec, 5
	lea	tmp, [mul_array + vec_i]

	movdqu	xgft1_lo, [tmp]		;Load array Ax{00}, Ax{01}, Ax{02}, ...
	movdqu	xgft1_hi, [tmp+16]	; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
	movdqu	xgft2_lo, [tmp+vec]	;Load array Bx{00}, Bx{01}, Bx{02}, ...
	movdqu	xgft2_hi, [tmp+vec+16]	; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
	movdqu	xgft3_lo, [tmp+2*vec]	;Load array Cx{00}, Cx{01}, Cx{02}, ...
	movdqu	xgft3_hi, [tmp+2*vec+16]	; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
	mov	dest2, [dest1+PS]	; reuse mul_array
	mov	dest3, [dest1+2*PS]	; reuse vec_i
	mov	dest1, [dest1]

.loop16:
	XLDR	x0, [src+pos]		;Get next source vector
	movdqa	xtmph1, xgft1_hi	;Reload const array registers
	movdqa	xtmpl1, xgft1_lo
	movdqa	xtmph2, xgft2_hi	;Reload const array registers
	movdqa	xtmpl2, xgft2_lo
	movdqa	xtmph3, xgft3_hi	;Reload const array registers
	movdqa	xtmpl3, xgft3_lo

	XLDR	xd1, [dest1+pos]	;Get next dest vector

	movdqa	xtmpa, x0		;Keep unshifted copy of src
	psraw	x0, 4			;Shift to put high nibble into bits 4-0
	pand	x0, xmask0f		;Mask high src nibble in bits 4-0
	pand	xtmpa, xmask0f		;Mask low src nibble in bits 4-0

	; dest1
	pshufb	xtmph1, x0		;Lookup mul table of high nibble
	pshufb	xtmpl1, xtmpa		;Lookup mul table of low nibble
	pxor	xtmph1, xtmpl1		;GF add high and low partials
	pxor	xd1, xtmph1

	XLDR	xd2, [dest2+pos]	;reuse xtmpl1. Get next dest vector
	XLDR	xd3, [dest3+pos]	;reuse xtmph1. Get next dest vector

	; dest2
	pshufb	xtmph2, x0		;Lookup mul table of high nibble
	pshufb	xtmpl2, xtmpa		;Lookup mul table of low nibble
	pxor	xtmph2, xtmpl2		;GF add high and low partials
	pxor	xd2, xtmph2

	; dest3
	pshufb	xtmph3, x0		;Lookup mul table of high nibble
	pshufb	xtmpl3, xtmpa		;Lookup mul table of low nibble
	pxor	xtmph3, xtmpl3		;GF add high and low partials
	pxor	xd3, xtmph3

	XSTR	[dest1+pos], xd1	;Store result
	XSTR	[dest2+pos], xd2	;Store result
	XSTR	[dest3+pos], xd3	;Store result

	add	pos, 16			;Loop on 16 bytes at a time
	cmp	pos, len
	jle	.loop16

	lea	tmp, [len + 16]
	cmp	pos, tmp
	je	.return_pass

.lessthan16:
	;; Tail len
	;; Do one more overlap pass
	mov	tmp, len		;Overlapped offset length-16

	XLDR	x0, [src+tmp]		;Get next source vector
	XLDR	xd1, [dest1+tmp]	;Get next dest vector
	XLDR	xd2, [dest2+tmp]	;reuse xtmpl1. Get next dest vector
	XLDR	xd3, [dest3+tmp]	;reuse xtmph1. Get next dest vector

	sub	len, pos

	movdqa	xtmph3, [constip16]	;Load const of i + 16
	pinsrb	xtmpl3, len.w, 15
	pshufb	xtmpl3, xmask0f		;Broadcast len to all bytes
	pcmpgtb	xtmpl3, xtmph3

	movdqa	xtmpa, x0		;Keep unshifted copy of src
	psraw	x0, 4			;Shift to put high nibble into bits 4-0
	pand	x0, xmask0f		;Mask high src nibble in bits 4-0
	pand	xtmpa, xmask0f		;Mask low src nibble in bits 4-0

	; dest1
	pshufb	xgft1_hi, x0		;Lookup mul table of high nibble
	pshufb	xgft1_lo, xtmpa		;Lookup mul table of low nibble
	pxor	xgft1_hi, xgft1_lo	;GF add high and low partials
	pand	xgft1_hi, xtmpl3
	pxor	xd1, xgft1_hi

	; dest2
	pshufb	xgft2_hi, x0		;Lookup mul table of high nibble
	pshufb	xgft2_lo, xtmpa		;Lookup mul table of low nibble
	pxor	xgft2_hi, xgft2_lo	;GF add high and low partials
	pand	xgft2_hi, xtmpl3
	pxor	xd2, xgft2_hi

	; dest3
	pshufb	xgft3_hi, x0		;Lookup mul table of high nibble
	pshufb	xgft3_lo, xtmpa		;Lookup mul table of low nibble
	pxor	xgft3_hi, xgft3_lo	;GF add high and low partials
	pand	xgft3_hi, xtmpl3
	pxor	xd3, xgft3_hi

	XSTR	[dest1+tmp], xd1	;Store result
	XSTR	[dest2+tmp], xd2	;Store result
	XSTR	[dest3+tmp], xd3	;Store result

.return_pass:
	FUNC_RESTORE
	mov	return, 0
	ret

.return_fail:
	FUNC_RESTORE
	mov	return, 1
	ret

endproc_frame

section .data

align 16

mask0f:
	ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
constip16:
	ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff

;;;       func             core, ver, snum
slversion gf_3vect_mad_sse, 00,  01,  0206
Commit	Line	Data
7c673cae FG	1	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
	2	; Copyright(c) 2011-2015 Intel Corporation All rights reserved.
	3	;
	4	; Redistribution and use in source and binary forms, with or without
	5	; modification, are permitted provided that the following conditions
	6	; are met:
	7	; * Redistributions of source code must retain the above copyright
	8	; notice, this list of conditions and the following disclaimer.
	9	; * Redistributions in binary form must reproduce the above copyright
	10	; notice, this list of conditions and the following disclaimer in
	11	; the documentation and/or other materials provided with the
	12	; distribution.
	13	; * Neither the name of Intel Corporation nor the names of its
	14	; contributors may be used to endorse or promote products derived
	15	; from this software without specific prior written permission.
	16	;
	17	; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	18	; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	19	; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
	20	; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	21	; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
	22	; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
	23	; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
	24	; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
	25	; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	26	; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	27	; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	28	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
	29
	30	;;;
	31	;;; gf_3vect_mad_sse(len, vec, vec_i, mul_array, src, dest);
	32	;;;
	33
	34	%include "reg_sizes.asm"
	35
	36	%define PS 8
	37	%ifidn __OUTPUT_FORMAT__, win64
	38	%define arg0 rcx
	39	%define arg0.w ecx
	40	%define arg1 rdx
	41	%define arg2 r8
	42	%define arg3 r9
	43	%define arg4 r12
	44	%define arg5 r15
	45	%define tmp r11
	46	%define return rax
	47	%define return.w eax
	48	%define stack_size 1610 + 38
	49	%define arg(x) [rsp + stack_size + PS + PS*x]
	50	%define func(x) proc_frame x
	51
	52	%macro FUNC_SAVE 0
	53	sub rsp, stack_size
	54	movdqa [rsp+16*0],xmm6
	55	movdqa [rsp+16*1],xmm7
	56	movdqa [rsp+16*2],xmm8
	57	movdqa [rsp+16*3],xmm9
	58	movdqa [rsp+16*4],xmm10
	59	movdqa [rsp+16*5],xmm11
	60	movdqa [rsp+16*6],xmm12
	61	movdqa [rsp+16*7],xmm13
	62	movdqa [rsp+16*8],xmm14
	63	movdqa [rsp+16*9],xmm15
	64	save_reg r12, 1016 + 08
65	save_reg r15, 1016 + 18
66	end_prolog
67	mov arg4, arg(4)
68	mov arg5, arg(5)
69	%endmacro
70
71	%macro FUNC_RESTORE 0
72	movdqa xmm6, [rsp+16*0]
73	movdqa xmm7, [rsp+16*1]
74	movdqa xmm8, [rsp+16*2]
75	movdqa xmm9, [rsp+16*3]
76	movdqa xmm10, [rsp+16*4]
77	movdqa xmm11, [rsp+16*5]
78	movdqa xmm12, [rsp+16*6]
79	movdqa xmm13, [rsp+16*7]
80	movdqa xmm14, [rsp+16*8]
81	movdqa xmm15, [rsp+16*9]
82	mov r12, [rsp + 1016 + 08]
83	mov r15, [rsp + 1016 + 18]
84	add rsp, stack_size
85	%endmacro
86
87	%elifidn __OUTPUT_FORMAT__, elf64
88	%define arg0 rdi
89	%define arg0.w edi
90	%define arg1 rsi
91	%define arg2 rdx
92	%define arg3 rcx
93	%define arg4 r8
94	%define arg5 r9
95	%define tmp r11
96	%define return rax
97	%define return.w eax
98
99	%define func(x) x:
100	%define FUNC_SAVE
101	%define FUNC_RESTORE
102	%endif
103
104	;;; gf_3vect_mad_sse(len, vec, vec_i, mul_array, src, dest)
105	%define len arg0
106	%define len.w arg0.w
107	%define vec arg1
108	%define vec_i arg2
109	%define mul_array arg3
110	%define src arg4
111	%define dest1 arg5
112	%define pos return
113	%define pos.w return.w
114
115	%define dest2 mul_array
116	%define dest3 vec_i
117
118	%ifndef EC_ALIGNED_ADDR
119	;;; Use Un-aligned load/store
120	%define XLDR movdqu
121	%define XSTR movdqu
122	%else
123	;;; Use Non-temporal load/stor
124	%ifdef NO_NT_LDST
125	%define XLDR movdqa
126	%define XSTR movdqa
127	%else
128	%define XLDR movntdqa
129	%define XSTR movntdq
130	%endif
131	%endif
132
133	default rel
134
135	[bits 64]
136	section .text
137
138	%define xmask0f xmm15
139	%define xgft1_lo xmm14
140	%define xgft1_hi xmm13
141	%define xgft2_lo xmm12
142	%define xgft2_hi xmm11
143	%define xgft3_lo xmm10
144	%define xgft3_hi xmm9
145
146	%define x0 xmm0
147	%define xtmpa xmm1
148	%define xtmph1 xmm2
149	%define xtmpl1 xmm3
150	%define xtmph2 xmm4
151	%define xtmpl2 xmm5
152	%define xtmph3 xmm6
153	%define xtmpl3 xmm7
154	%define xd1 xmm8
155	%define xd2 xtmpl1
156	%define xd3 xtmph1
157
158	align 16
159	global gf_3vect_mad_sse:function
160	func(gf_3vect_mad_sse)
161	FUNC_SAVE
162	sub len, 16
163	jl .return_fail
164	xor pos, pos
165	movdqa xmask0f, [mask0f] ;Load mask of lower nibble in each byte
166	sal vec_i, 5 ;Multiply by 32
167	sal vec, 5
168	lea tmp, [mul_array + vec_i]
169
170	movdqu xgft1_lo, [tmp] ;Load array Ax{00}, Ax{01}, Ax{02}, ...
171	movdqu xgft1_hi, [tmp+16] ; " Ax{00}, Ax{10}, Ax{20}, ... , Ax{f0}
172	movdqu xgft2_lo, [tmp+vec] ;Load array Bx{00}, Bx{01}, Bx{02}, ...
173	movdqu xgft2_hi, [tmp+vec+16] ; " Bx{00}, Bx{10}, Bx{20}, ... , Bx{f0}
174	movdqu xgft3_lo, [tmp+2*vec] ;Load array Cx{00}, Cx{01}, Cx{02}, ...
175	movdqu xgft3_hi, [tmp+2*vec+16] ; " Cx{00}, Cx{10}, Cx{20}, ... , Cx{f0}
176	mov dest2, [dest1+PS] ; reuse mul_array
177	mov dest3, [dest1+2*PS] ; reuse vec_i
178	mov dest1, [dest1]
179
180	.loop16:
181	XLDR x0, [src+pos] ;Get next source vector
182	movdqa xtmph1, xgft1_hi ;Reload const array registers
183	movdqa xtmpl1, xgft1_lo
184	movdqa xtmph2, xgft2_hi ;Reload const array registers
185	movdqa xtmpl2, xgft2_lo
186	movdqa xtmph3, xgft3_hi ;Reload const array registers
187	movdqa xtmpl3, xgft3_lo
188
189	XLDR xd1, [dest1+pos] ;Get next dest vector
190
191	movdqa xtmpa, x0 ;Keep unshifted copy of src
192	psraw x0, 4 ;Shift to put high nibble into bits 4-0
193	pand x0, xmask0f ;Mask high src nibble in bits 4-0
194	pand xtmpa, xmask0f ;Mask low src nibble in bits 4-0
195
196	; dest1
197	pshufb xtmph1, x0 ;Lookup mul table of high nibble
198	pshufb xtmpl1, xtmpa ;Lookup mul table of low nibble
199	pxor xtmph1, xtmpl1 ;GF add high and low partials
200	pxor xd1, xtmph1
201
202	XLDR xd2, [dest2+pos] ;reuse xtmpl1. Get next dest vector
203	XLDR xd3, [dest3+pos] ;reuse xtmph1. Get next dest vector
204
205	; dest2
206	pshufb xtmph2, x0 ;Lookup mul table of high nibble
207	pshufb xtmpl2, xtmpa ;Lookup mul table of low nibble
208	pxor xtmph2, xtmpl2 ;GF add high and low partials
209	pxor xd2, xtmph2
210
211	; dest3
212	pshufb xtmph3, x0 ;Lookup mul table of high nibble
213	pshufb xtmpl3, xtmpa ;Lookup mul table of low nibble
214	pxor xtmph3, xtmpl3 ;GF add high and low partials
215	pxor xd3, xtmph3
216
217	XSTR [dest1+pos], xd1 ;Store result
218	XSTR [dest2+pos], xd2 ;Store result
219	XSTR [dest3+pos], xd3 ;Store result
220
221	add pos, 16 ;Loop on 16 bytes at a time
222	cmp pos, len
223	jle .loop16
224
225	lea tmp, [len + 16]
226	cmp pos, tmp
227	je .return_pass
228
229	.lessthan16:
230	;; Tail len
231	;; Do one more overlap pass
232	mov tmp, len ;Overlapped offset length-16
233
234	XLDR x0, [src+tmp] ;Get next source vector
235	XLDR xd1, [dest1+tmp] ;Get next dest vector
236	XLDR xd2, [dest2+tmp] ;reuse xtmpl1. Get next dest vector
237	XLDR xd3, [dest3+tmp] ;reuse xtmph1. Get next dest vector
238
239	sub len, pos
240
241	movdqa xtmph3, [constip16] ;Load const of i + 16
242	pinsrb xtmpl3, len.w, 15
243	pshufb xtmpl3, xmask0f ;Broadcast len to all bytes
244	pcmpgtb xtmpl3, xtmph3
245
246	movdqa xtmpa, x0 ;Keep unshifted copy of src
247	psraw x0, 4 ;Shift to put high nibble into bits 4-0
248	pand x0, xmask0f ;Mask high src nibble in bits 4-0
249	pand xtmpa, xmask0f ;Mask low src nibble in bits 4-0
250
251	; dest1
252	pshufb xgft1_hi, x0 ;Lookup mul table of high nibble
253	pshufb xgft1_lo, xtmpa ;Lookup mul table of low nibble
254	pxor xgft1_hi, xgft1_lo ;GF add high and low partials
255	pand xgft1_hi, xtmpl3
256	pxor xd1, xgft1_hi
257
258	; dest2
259	pshufb xgft2_hi, x0 ;Lookup mul table of high nibble
260	pshufb xgft2_lo, xtmpa ;Lookup mul table of low nibble
261	pxor xgft2_hi, xgft2_lo ;GF add high and low partials
262	pand xgft2_hi, xtmpl3
263	pxor xd2, xgft2_hi
264
265	; dest3
266	pshufb xgft3_hi, x0 ;Lookup mul table of high nibble
267	pshufb xgft3_lo, xtmpa ;Lookup mul table of low nibble
268	pxor xgft3_hi, xgft3_lo ;GF add high and low partials
269	pand xgft3_hi, xtmpl3
270	pxor xd3, xgft3_hi
271
272	XSTR [dest1+tmp], xd1 ;Store result
273	XSTR [dest2+tmp], xd2 ;Store result
274	XSTR [dest3+tmp], xd3 ;Store result
275
276	.return_pass:
277	FUNC_RESTORE
278	mov return, 0
279	ret
280
281	.return_fail:
282	FUNC_RESTORE
283	mov return, 1
284	ret
285
286	endproc_frame
287
288	section .data
289
290	align 16
291
292	mask0f:
293	ddq 0x0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f0f
294	constip16:
295	ddq 0xf0f1f2f3f4f5f6f7f8f9fafbfcfdfeff
296
297	;;; func core, ver, snum
298	slversion gf_3vect_mad_sse, 00, 01, 0206