]>
Commit | Line | Data |
---|---|---|
7c673cae FG |
1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ; Copyright(c) 2011-2016 Intel Corporation All rights reserved. | |
3 | ; | |
4 | ; Redistribution and use in source and binary forms, with or without | |
5 | ; modification, are permitted provided that the following conditions | |
6 | ; are met: | |
7 | ; * Redistributions of source code must retain the above copyright | |
8 | ; notice, this list of conditions and the following disclaimer. | |
9 | ; * Redistributions in binary form must reproduce the above copyright | |
10 | ; notice, this list of conditions and the following disclaimer in | |
11 | ; the documentation and/or other materials provided with the | |
12 | ; distribution. | |
13 | ; * Neither the name of Intel Corporation nor the names of its | |
14 | ; contributors may be used to endorse or promote products derived | |
15 | ; from this software without specific prior written permission. | |
16 | ; | |
17 | ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | |
18 | ; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | |
19 | ; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | |
20 | ; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | |
21 | ; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
22 | ; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | |
23 | ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
24 | ; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
25 | ; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
26 | ; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | |
27 | ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
28 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; | |
29 | ||
30 | %include "options.asm" | |
31 | ||
32 | ; Assumes m_out_buf is a register | |
33 | ; Clobbers RCX | |
34 | ; code is clobbered | |
35 | ; write_bits_always m_bits, m_bit_count, code, count, m_out_buf, tmp1 | |
36 | %macro write_bits_always 6 | |
37 | %define %%m_bits %1 | |
38 | %define %%m_bit_count %2 | |
39 | %define %%code %3 | |
40 | %define %%count %4 | |
41 | %define %%m_out_buf %5 | |
42 | %define %%tmp1 %6 | |
43 | ||
44 | %ifdef USE_HSWNI | |
45 | shlx %%code, %%code, %%m_bit_count | |
46 | %else | |
47 | mov rcx, %%m_bit_count | |
48 | shl %%code, cl | |
49 | %endif | |
50 | or %%m_bits, %%code | |
51 | add %%m_bit_count, %%count | |
52 | ||
53 | movnti [%%m_out_buf], %%m_bits | |
54 | mov rcx, %%m_bit_count | |
55 | shr rcx, 3 ; rcx = bytes | |
56 | add %%m_out_buf, rcx | |
57 | shl rcx, 3 ; rcx = bits | |
58 | sub %%m_bit_count, rcx | |
59 | %ifdef USE_HSWNI | |
60 | shrx %%m_bits, %%m_bits, rcx | |
61 | %else | |
62 | shr %%m_bits, cl | |
63 | %endif | |
64 | %endm | |
65 | ||
66 | ; Assumes m_out_buf is a register | |
67 | ; Clobbers RCX | |
68 | ; code is clobbered | |
69 | ; write_bits_safe m_bits, m_bit_count, code, count, m_out_buf, tmp1 | |
70 | %macro write_bits_safe 6 | |
71 | %define %%m_bits %1 | |
72 | %define %%m_bit_count %2 | |
73 | %define %%code %3 | |
74 | %define %%count %4 | |
75 | %define %%m_out_buf %5 | |
76 | %define %%tmp1 %6 | |
77 | ||
78 | mov %%tmp1, %%code | |
79 | %ifdef USE_HSWNI | |
80 | shlx %%tmp1, %%tmp1, %%m_bit_count | |
81 | %else | |
82 | mov rcx, %%m_bit_count | |
83 | shl %%tmp1, cl | |
84 | %endif | |
85 | or %%m_bits, %%tmp1 | |
86 | add %%m_bit_count, %%count | |
87 | cmp %%m_bit_count, 64 | |
88 | jb %%not_full | |
89 | sub %%m_bit_count, 64 | |
90 | movnti [%%m_out_buf], %%m_bits | |
91 | add %%m_out_buf, 8 | |
92 | mov rcx, %%count | |
93 | sub rcx, %%m_bit_count | |
94 | mov %%m_bits, %%code | |
95 | %ifdef USE_HSWNI | |
96 | shrx %%m_bits, %%m_bits, rcx | |
97 | %else | |
98 | shr %%m_bits, cl | |
99 | %endif | |
100 | %%not_full: | |
101 | %endm | |
102 | ||
103 | ; Assumes m_out_buf is a register | |
104 | ; Clobbers RCX | |
105 | ;; check_space num_bits, m_bits, m_bit_count, m_out_buf, tmp1 | |
106 | %macro check_space 5 | |
107 | %define %%num_bits %1 | |
108 | %define %%m_bits %2 | |
109 | %define %%m_bit_count %3 | |
110 | %define %%m_out_buf %4 | |
111 | %define %%tmp1 %5 | |
112 | ||
113 | mov %%tmp1, 63 | |
114 | sub %%tmp1, %%m_bit_count | |
115 | cmp %%tmp1, %%num_bits | |
116 | jae %%space_ok | |
117 | ||
118 | ; if (63 - m_bit_count < num_bits) | |
119 | movnti [%%m_out_buf], %%m_bits | |
120 | mov rcx, %%m_bit_count | |
121 | shr rcx, 3 ; rcx = bytes | |
122 | add %%m_out_buf, rcx | |
123 | shl rcx, 3 ; rcx = bits | |
124 | sub %%m_bit_count, rcx | |
125 | %ifdef USE_HSWNI | |
126 | shrx %%m_bits, %%m_bits, rcx | |
127 | %else | |
128 | shr %%m_bits, cl | |
129 | %endif | |
130 | %%space_ok: | |
131 | %endm | |
132 | ||
133 | ; rcx is clobbered | |
134 | ; code is clobbered | |
135 | ; write_bits_unsafe m_bits, m_bit_count, code, count | |
136 | %macro write_bits_unsafe 4 | |
137 | %define %%m_bits %1 | |
138 | %define %%m_bit_count %2 | |
139 | %define %%code %3 | |
140 | %define %%count %4 | |
141 | %ifdef USE_HSWNI | |
142 | shlx %%code, %%code, %%m_bit_count | |
143 | %else | |
144 | mov rcx, %%m_bit_count | |
145 | shl %%code, cl | |
146 | %endif | |
147 | or %%m_bits, %%code | |
148 | add %%m_bit_count, %%count | |
149 | %endm | |
150 | ||
151 | ; pad_to_byte m_bit_count, extra_bits | |
152 | %macro pad_to_byte 2 | |
153 | %define %%m_bit_count %1 | |
154 | %define %%extra_bits %2 | |
155 | ||
156 | mov %%extra_bits, %%m_bit_count | |
157 | neg %%extra_bits | |
158 | and %%extra_bits, 7 | |
159 | add %%m_bit_count, %%extra_bits | |
160 | %endm | |
161 | ||
162 | ; Assumes m_out_buf is a memory reference | |
163 | ; flush m_bits, m_bit_count, m_out_buf, tmp1 | |
164 | %macro flush 4 | |
165 | %define %%m_bits %1 | |
166 | %define %%m_bit_count %2 | |
167 | %define %%m_out_buf %3 | |
168 | %define %%tmp1 %4 | |
169 | ||
170 | test %%m_bit_count, %%m_bit_count | |
171 | jz %%bit_count_is_zero | |
172 | ||
173 | mov %%tmp1, %%m_out_buf | |
174 | movnti [%%tmp1], %%m_bits | |
175 | ||
176 | add %%m_bit_count, 7 | |
177 | shr %%m_bit_count, 3 ; bytes | |
178 | add %%tmp1, %%m_bit_count | |
179 | mov %%m_out_buf, %%tmp1 | |
180 | ||
181 | %%bit_count_is_zero: | |
182 | xor %%m_bits, %%m_bits | |
183 | xor %%m_bit_count, %%m_bit_count | |
184 | %endm | |
185 | ||
186 | %macro write_bits 6 | |
187 | %define %%m_bits %1 | |
188 | %define %%m_bit_count %2 | |
189 | %define %%code %3 | |
190 | %define %%count %4 | |
191 | %define %%m_out_buf %5 | |
192 | %define %%tmp1 %6 | |
193 | ||
194 | %ifdef USE_BITBUF8 | |
195 | write_bits_safe %%m_bits, %%m_bit_count, %%code, %%count, %%m_out_buf, %%tmp1 | |
196 | %elifdef USE_BITBUFB | |
197 | write_bits_always %%m_bits, %%m_bit_count, %%code, %%count, %%m_out_buf, %%tmp1 | |
198 | %else | |
199 | ; state->bitbuf.check_space(code_len2); | |
200 | check_space %%count, %%m_bits, %%m_bit_count, %%m_out_buf, %%tmp1 | |
201 | ; state->bitbuf.write_bits(code2, code_len2); | |
202 | write_bits_unsafe %%m_bits, %%m_bit_count, %%code, %%count | |
203 | ; code2 is clobbered, rcx is clobbered | |
204 | %endif | |
205 | %endm | |
224ce89b WB |
206 | |
207 | %macro write_dword 2 | |
208 | %define %%data %1d | |
209 | %define %%addr %2 | |
210 | movnti [%%addr], %%data | |
211 | add %%addr, 4 | |
212 | %endm |