projects / ceph.git / blame
| Commit | Line | Data |
|---|---|---|
| 11fdf7f2 TL |
1 | /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) |
| 2 | * | |
| 3 | * Copyright 2008-2016 Freescale Semiconductor Inc. | |
| f67539c2 | 4 | * Copyright 2016, 2019 NXP |
| 11fdf7f2 TL |
5 | * |
| 6 | */ | |
| 7 | ||
| 8 | /* | |
| 9 | * SEC descriptor composition header. | |
| 10 | * Definitions to support SEC descriptor instruction generation | |
| 11 | */ | |
| 12 | ||
| 13 | #ifndef __RTA_DESC_H__ | |
| 14 | #define __RTA_DESC_H__ | |
| 15 | ||
| f67539c2 | 16 | /* compat.h is not delivered in kernel */ |
| 11fdf7f2 | 17 | #ifndef __KERNEL__ |
| f67539c2 | 18 | #include "compat.h" |
| 11fdf7f2 TL |
19 | #endif |
| 20 | ||
| f67539c2 TL |
21 | extern enum rta_sec_era rta_sec_era; |
| 22 | ||
| 11fdf7f2 TL |
23 | /* Max size of any SEC descriptor in 32-bit words, inclusive of header */ |
| 24 | #define MAX_CAAM_DESCSIZE 64 | |
| 25 | ||
| 26 | #define CAAM_CMD_SZ sizeof(uint32_t) | |
| 27 | #define CAAM_PTR_SZ sizeof(dma_addr_t) | |
| 28 | #define CAAM_DESC_BYTES_MAX (CAAM_CMD_SZ * MAX_CAAM_DESCSIZE) | |
| 29 | #define DESC_JOB_IO_LEN (CAAM_CMD_SZ * 5 + CAAM_PTR_SZ * 3) | |
| 30 | ||
| 31 | /* Block size of any entity covered/uncovered with a KEK/TKEK */ | |
| 32 | #define KEK_BLOCKSIZE 16 | |
| 33 | ||
| 34 | /* | |
| 35 | * Supported descriptor command types as they show up | |
| 36 | * inside a descriptor command word. | |
| 37 | */ | |
| 38 | #define CMD_SHIFT 27 | |
| 39 | #define CMD_MASK (0x1f << CMD_SHIFT) | |
| 40 | ||
| 41 | #define CMD_KEY (0x00 << CMD_SHIFT) | |
| 42 | #define CMD_SEQ_KEY (0x01 << CMD_SHIFT) | |
| 43 | #define CMD_LOAD (0x02 << CMD_SHIFT) | |
| 44 | #define CMD_SEQ_LOAD (0x03 << CMD_SHIFT) | |
| 45 | #define CMD_FIFO_LOAD (0x04 << CMD_SHIFT) | |
| 46 | #define CMD_SEQ_FIFO_LOAD (0x05 << CMD_SHIFT) | |
| 47 | #define CMD_MOVEDW (0x06 << CMD_SHIFT) | |
| 48 | #define CMD_MOVEB (0x07 << CMD_SHIFT) | |
| 49 | #define CMD_STORE (0x0a << CMD_SHIFT) | |
| 50 | #define CMD_SEQ_STORE (0x0b << CMD_SHIFT) | |
| 51 | #define CMD_FIFO_STORE (0x0c << CMD_SHIFT) | |
| 52 | #define CMD_SEQ_FIFO_STORE (0x0d << CMD_SHIFT) | |
| 53 | #define CMD_MOVE_LEN (0x0e << CMD_SHIFT) | |
| 54 | #define CMD_MOVE (0x0f << CMD_SHIFT) | |
| 55 | #define CMD_OPERATION ((uint32_t)(0x10 << CMD_SHIFT)) | |
| 56 | #define CMD_SIGNATURE ((uint32_t)(0x12 << CMD_SHIFT)) | |
| 57 | #define CMD_JUMP ((uint32_t)(0x14 << CMD_SHIFT)) | |
| 58 | #define CMD_MATH ((uint32_t)(0x15 << CMD_SHIFT)) | |
| 59 | #define CMD_DESC_HDR ((uint32_t)(0x16 << CMD_SHIFT)) | |
| 60 | #define CMD_SHARED_DESC_HDR ((uint32_t)(0x17 << CMD_SHIFT)) | |
| 61 | #define CMD_MATHI ((uint32_t)(0x1d << CMD_SHIFT)) | |
| 62 | #define CMD_SEQ_IN_PTR ((uint32_t)(0x1e << CMD_SHIFT)) | |
| 63 | #define CMD_SEQ_OUT_PTR ((uint32_t)(0x1f << CMD_SHIFT)) | |
| 64 | ||
| 65 | /* General-purpose class selector for all commands */ | |
| 66 | #define CLASS_SHIFT 25 | |
| 67 | #define CLASS_MASK (0x03 << CLASS_SHIFT) | |
| 68 | ||
| 69 | #define CLASS_NONE (0x00 << CLASS_SHIFT) | |
| 70 | #define CLASS_1 (0x01 << CLASS_SHIFT) | |
| 71 | #define CLASS_2 (0x02 << CLASS_SHIFT) | |
| 72 | #define CLASS_BOTH (0x03 << CLASS_SHIFT) | |
| 73 | ||
| 74 | /* ICV Check bits for Algo Operation command */ | |
| 75 | #define ICV_CHECK_DISABLE 0 | |
| 76 | #define ICV_CHECK_ENABLE 1 | |
| 77 | ||
| 78 | /* Encap Mode check bits for Algo Operation command */ | |
| 79 | #define DIR_ENC 1 | |
| 80 | #define DIR_DEC 0 | |
| 81 | ||
| 82 | /* | |
| 83 | * Descriptor header command constructs | |
| 84 | * Covers shared, job, and trusted descriptor headers | |
| 85 | */ | |
| 86 | ||
| 87 | /* | |
| 88 | * Extended Job Descriptor Header | |
| 89 | */ | |
| 90 | #define HDR_EXT BIT(24) | |
| 91 | ||
| 92 | /* | |
| 93 | * Read input frame as soon as possible (SHR HDR) | |
| 94 | */ | |
| 95 | #define HDR_RIF BIT(25) | |
| 96 | ||
| 97 | /* | |
| 98 | * Require SEQ LIODN to be the Same (JOB HDR) | |
| 99 | */ | |
| 100 | #define HDR_RSLS BIT(25) | |
| 101 | ||
| 102 | /* | |
| 103 | * Do Not Run - marks a descriptor not executable if there was | |
| 104 | * a preceding error somewhere | |
| 105 | */ | |
| 106 | #define HDR_DNR BIT(24) | |
| 107 | ||
| 108 | /* | |
| 109 | * ONE - should always be set. Combination of ONE (always | |
| 110 | * set) and ZRO (always clear) forms an endianness sanity check | |
| 111 | */ | |
| 112 | #define HDR_ONE BIT(23) | |
| 113 | #define HDR_ZRO BIT(15) | |
| 114 | ||
| 115 | /* Start Index or SharedDesc Length */ | |
| 116 | #define HDR_START_IDX_SHIFT 16 | |
| 117 | #define HDR_START_IDX_MASK (0x3f << HDR_START_IDX_SHIFT) | |
| f67539c2 | 118 | #define HDR_START_IDX_MASK_ERA10 (0x7f << HDR_START_IDX_SHIFT) |
| 11fdf7f2 TL |
119 | |
| 120 | /* If shared descriptor header, 6-bit length */ | |
| 121 | #define HDR_DESCLEN_SHR_MASK 0x3f | |
| f67539c2 TL |
122 | /* If shared descriptor header, 7-bit length era10 onwards*/ |
| 123 | #define HDR_DESCLEN_SHR_MASK_ERA10 0x7f | |
| 11fdf7f2 TL |
124 | |
| 125 | /* If non-shared header, 7-bit length */ | |
| 126 | #define HDR_DESCLEN_MASK 0x7f | |
| 127 | ||
| 128 | /* This is a TrustedDesc (if not SharedDesc) */ | |
| 129 | #define HDR_TRUSTED BIT(14) | |
| 130 | ||
| 131 | /* Make into TrustedDesc (if not SharedDesc) */ | |
| 132 | #define HDR_MAKE_TRUSTED BIT(13) | |
| 133 | ||
| 134 | /* Clear Input FiFO (if SharedDesc) */ | |
| 135 | #define HDR_CLEAR_IFIFO BIT(13) | |
| 136 | ||
| 137 | /* Save context if self-shared (if SharedDesc) */ | |
| 138 | #define HDR_SAVECTX BIT(12) | |
| 139 | ||
| 140 | /* Next item points to SharedDesc */ | |
| 141 | #define HDR_SHARED BIT(12) | |
| 142 | ||
| 143 | /* | |
| 144 | * Reverse Execution Order - execute JobDesc first, then | |
| 145 | * execute SharedDesc (normally SharedDesc goes first). | |
| 146 | */ | |
| 147 | #define HDR_REVERSE BIT(11) | |
| 148 | ||
| 149 | /* Propagate DNR property to SharedDesc */ | |
| 150 | #define HDR_PROP_DNR BIT(11) | |
| 151 | ||
| 152 | /* DECO Select Valid */ | |
| 153 | #define HDR_EXT_DSEL_VALID BIT(7) | |
| 154 | ||
| 155 | /* Fake trusted descriptor */ | |
| 156 | #define HDR_EXT_FTD BIT(8) | |
| 157 | ||
| 158 | /* JobDesc/SharedDesc share property */ | |
| 159 | #define HDR_SD_SHARE_SHIFT 8 | |
| 160 | #define HDR_SD_SHARE_MASK (0x03 << HDR_SD_SHARE_SHIFT) | |
| 161 | #define HDR_JD_SHARE_SHIFT 8 | |
| 162 | #define HDR_JD_SHARE_MASK (0x07 << HDR_JD_SHARE_SHIFT) | |
| 163 | ||
| 164 | #define HDR_SHARE_NEVER (0x00 << HDR_SD_SHARE_SHIFT) | |
| 165 | #define HDR_SHARE_WAIT (0x01 << HDR_SD_SHARE_SHIFT) | |
| 166 | #define HDR_SHARE_SERIAL (0x02 << HDR_SD_SHARE_SHIFT) | |
| 167 | #define HDR_SHARE_ALWAYS (0x03 << HDR_SD_SHARE_SHIFT) | |
| 168 | #define HDR_SHARE_DEFER (0x04 << HDR_SD_SHARE_SHIFT) | |
| 169 | ||
| 170 | /* JobDesc/SharedDesc descriptor length */ | |
| 171 | #define HDR_JD_LENGTH_MASK 0x7f | |
| 172 | #define HDR_SD_LENGTH_MASK 0x3f | |
| 173 | ||
| 174 | /* | |
| 175 | * KEY/SEQ_KEY Command Constructs | |
| 176 | */ | |
| 177 | ||
| 178 | /* Key Destination Class: 01 = Class 1, 02 - Class 2 */ | |
| 179 | #define KEY_DEST_CLASS_SHIFT 25 | |
| 180 | #define KEY_DEST_CLASS_MASK (0x03 << KEY_DEST_CLASS_SHIFT) | |
| 181 | #define KEY_DEST_CLASS1 (1 << KEY_DEST_CLASS_SHIFT) | |
| 182 | #define KEY_DEST_CLASS2 (2 << KEY_DEST_CLASS_SHIFT) | |
| 183 | ||
| 184 | /* Scatter-Gather Table/Variable Length Field */ | |
| 185 | #define KEY_SGF BIT(24) | |
| 186 | #define KEY_VLF BIT(24) | |
| 187 | ||
| 188 | /* Immediate - Key follows command in the descriptor */ | |
| 189 | #define KEY_IMM BIT(23) | |
| 190 | ||
| 191 | /* | |
| 192 | * Already in Input Data FIFO - the Input Data Sequence is not read, since it is | |
| 193 | * already in the Input Data FIFO. | |
| 194 | */ | |
| 195 | #define KEY_AIDF BIT(23) | |
| 196 | ||
| 197 | /* | |
| 198 | * Encrypted - Key is encrypted either with the KEK, or | |
| 199 | * with the TDKEK if this descriptor is trusted | |
| 200 | */ | |
| 201 | #define KEY_ENC BIT(22) | |
| 202 | ||
| 203 | /* | |
| 204 | * No Write Back - Do not allow key to be FIFO STOREd | |
| 205 | */ | |
| 206 | #define KEY_NWB BIT(21) | |
| 207 | ||
| 208 | /* | |
| 209 | * Enhanced Encryption of Key | |
| 210 | */ | |
| 211 | #define KEY_EKT BIT(20) | |
| 212 | ||
| 213 | /* | |
| 214 | * Encrypted with Trusted Key | |
| 215 | */ | |
| 216 | #define KEY_TK BIT(15) | |
| 217 | ||
| 218 | /* | |
| 219 | * Plaintext Store | |
| 220 | */ | |
| 221 | #define KEY_PTS BIT(14) | |
| 222 | ||
| 223 | /* | |
| 224 | * KDEST - Key Destination: 0 - class key register, | |
| 225 | * 1 - PKHA 'e', 2 - AFHA Sbox, 3 - MDHA split key | |
| 226 | */ | |
| 227 | #define KEY_DEST_SHIFT 16 | |
| 228 | #define KEY_DEST_MASK (0x03 << KEY_DEST_SHIFT) | |
| 229 | ||
| 230 | #define KEY_DEST_CLASS_REG (0x00 << KEY_DEST_SHIFT) | |
| 231 | #define KEY_DEST_PKHA_E (0x01 << KEY_DEST_SHIFT) | |
| 232 | #define KEY_DEST_AFHA_SBOX (0x02 << KEY_DEST_SHIFT) | |
| 233 | #define KEY_DEST_MDHA_SPLIT (0x03 << KEY_DEST_SHIFT) | |
| 234 | ||
| 235 | /* Length in bytes */ | |
| 236 | #define KEY_LENGTH_MASK 0x000003ff | |
| 237 | ||
| 238 | /* | |
| 239 | * LOAD/SEQ_LOAD/STORE/SEQ_STORE Command Constructs | |
| 240 | */ | |
| 241 | ||
| 242 | /* | |
| 243 | * Load/Store Destination: 0 = class independent CCB, | |
| 244 | * 1 = class 1 CCB, 2 = class 2 CCB, 3 = DECO | |
| 245 | */ | |
| 246 | #define LDST_CLASS_SHIFT 25 | |
| 247 | #define LDST_CLASS_MASK (0x03 << LDST_CLASS_SHIFT) | |
| 248 | #define LDST_CLASS_IND_CCB (0x00 << LDST_CLASS_SHIFT) | |
| 249 | #define LDST_CLASS_1_CCB (0x01 << LDST_CLASS_SHIFT) | |
| 250 | #define LDST_CLASS_2_CCB (0x02 << LDST_CLASS_SHIFT) | |
| 251 | #define LDST_CLASS_DECO (0x03 << LDST_CLASS_SHIFT) | |
| 252 | ||
| 253 | /* Scatter-Gather Table/Variable Length Field */ | |
| 254 | #define LDST_SGF BIT(24) | |
| 255 | #define LDST_VLF BIT(24) | |
| 256 | ||
| 257 | /* Immediate - Key follows this command in descriptor */ | |
| 258 | #define LDST_IMM_MASK 1 | |
| 259 | #define LDST_IMM_SHIFT 23 | |
| 260 | #define LDST_IMM BIT(23) | |
| 261 | ||
| 262 | /* SRC/DST - Destination for LOAD, Source for STORE */ | |
| 263 | #define LDST_SRCDST_SHIFT 16 | |
| 264 | #define LDST_SRCDST_MASK (0x7f << LDST_SRCDST_SHIFT) | |
| 265 | ||
| 266 | #define LDST_SRCDST_BYTE_CONTEXT (0x20 << LDST_SRCDST_SHIFT) | |
| 267 | #define LDST_SRCDST_BYTE_KEY (0x40 << LDST_SRCDST_SHIFT) | |
| 268 | #define LDST_SRCDST_BYTE_INFIFO (0x7c << LDST_SRCDST_SHIFT) | |
| 269 | #define LDST_SRCDST_BYTE_OUTFIFO (0x7e << LDST_SRCDST_SHIFT) | |
| 270 | ||
| 271 | #define LDST_SRCDST_WORD_MODE_REG (0x00 << LDST_SRCDST_SHIFT) | |
| 272 | #define LDST_SRCDST_WORD_DECO_JQCTRL (0x00 << LDST_SRCDST_SHIFT) | |
| 273 | #define LDST_SRCDST_WORD_KEYSZ_REG (0x01 << LDST_SRCDST_SHIFT) | |
| 274 | #define LDST_SRCDST_WORD_DECO_JQDAR (0x01 << LDST_SRCDST_SHIFT) | |
| 275 | #define LDST_SRCDST_WORD_DATASZ_REG (0x02 << LDST_SRCDST_SHIFT) | |
| 276 | #define LDST_SRCDST_WORD_DECO_STAT (0x02 << LDST_SRCDST_SHIFT) | |
| 277 | #define LDST_SRCDST_WORD_ICVSZ_REG (0x03 << LDST_SRCDST_SHIFT) | |
| 278 | #define LDST_SRCDST_BYTE_DCHKSM (0x03 << LDST_SRCDST_SHIFT) | |
| 279 | #define LDST_SRCDST_WORD_PID (0x04 << LDST_SRCDST_SHIFT) | |
| 280 | #define LDST_SRCDST_WORD_CHACTRL (0x06 << LDST_SRCDST_SHIFT) | |
| 281 | #define LDST_SRCDST_WORD_DECOCTRL (0x06 << LDST_SRCDST_SHIFT) | |
| 282 | #define LDST_SRCDST_WORD_IRQCTRL (0x07 << LDST_SRCDST_SHIFT) | |
| 283 | #define LDST_SRCDST_WORD_DECO_PCLOVRD (0x07 << LDST_SRCDST_SHIFT) | |
| 284 | #define LDST_SRCDST_WORD_CLRW (0x08 << LDST_SRCDST_SHIFT) | |
| 285 | #define LDST_SRCDST_WORD_DECO_MATH0 (0x08 << LDST_SRCDST_SHIFT) | |
| 286 | #define LDST_SRCDST_WORD_STAT (0x09 << LDST_SRCDST_SHIFT) | |
| 287 | #define LDST_SRCDST_WORD_DECO_MATH1 (0x09 << LDST_SRCDST_SHIFT) | |
| 288 | #define LDST_SRCDST_WORD_DECO_MATH2 (0x0a << LDST_SRCDST_SHIFT) | |
| 289 | #define LDST_SRCDST_WORD_DECO_AAD_SZ (0x0b << LDST_SRCDST_SHIFT) | |
| 290 | #define LDST_SRCDST_WORD_DECO_MATH3 (0x0b << LDST_SRCDST_SHIFT) | |
| 291 | #define LDST_SRCDST_WORD_CLASS1_IV_SZ (0x0c << LDST_SRCDST_SHIFT) | |
| 292 | #define LDST_SRCDST_WORD_ALTDS_CLASS1 (0x0f << LDST_SRCDST_SHIFT) | |
| 293 | #define LDST_SRCDST_WORD_PKHA_A_SZ (0x10 << LDST_SRCDST_SHIFT) | |
| 294 | #define LDST_SRCDST_WORD_GTR (0x10 << LDST_SRCDST_SHIFT) | |
| 295 | #define LDST_SRCDST_WORD_PKHA_B_SZ (0x11 << LDST_SRCDST_SHIFT) | |
| 296 | #define LDST_SRCDST_WORD_PKHA_N_SZ (0x12 << LDST_SRCDST_SHIFT) | |
| 297 | #define LDST_SRCDST_WORD_PKHA_E_SZ (0x13 << LDST_SRCDST_SHIFT) | |
| 298 | #define LDST_SRCDST_WORD_CLASS_CTX (0x20 << LDST_SRCDST_SHIFT) | |
| 299 | #define LDST_SRCDST_WORD_STR (0x20 << LDST_SRCDST_SHIFT) | |
| 300 | #define LDST_SRCDST_WORD_DESCBUF (0x40 << LDST_SRCDST_SHIFT) | |
| 301 | #define LDST_SRCDST_WORD_DESCBUF_JOB (0x41 << LDST_SRCDST_SHIFT) | |
| 302 | #define LDST_SRCDST_WORD_DESCBUF_SHARED (0x42 << LDST_SRCDST_SHIFT) | |
| 303 | #define LDST_SRCDST_WORD_DESCBUF_JOB_WE (0x45 << LDST_SRCDST_SHIFT) | |
| 304 | #define LDST_SRCDST_WORD_DESCBUF_SHARED_WE (0x46 << LDST_SRCDST_SHIFT) | |
| 305 | #define LDST_SRCDST_WORD_INFO_FIFO_SZL (0x70 << LDST_SRCDST_SHIFT) | |
| 306 | #define LDST_SRCDST_WORD_INFO_FIFO_SZM (0x71 << LDST_SRCDST_SHIFT) | |
| 307 | #define LDST_SRCDST_WORD_INFO_FIFO_L (0x72 << LDST_SRCDST_SHIFT) | |
| 308 | #define LDST_SRCDST_WORD_INFO_FIFO_M (0x73 << LDST_SRCDST_SHIFT) | |
| 309 | #define LDST_SRCDST_WORD_SZL (0x74 << LDST_SRCDST_SHIFT) | |
| 310 | #define LDST_SRCDST_WORD_SZM (0x75 << LDST_SRCDST_SHIFT) | |
| 311 | #define LDST_SRCDST_WORD_IFNSR (0x76 << LDST_SRCDST_SHIFT) | |
| 312 | #define LDST_SRCDST_WORD_OFNSR (0x77 << LDST_SRCDST_SHIFT) | |
| 313 | #define LDST_SRCDST_BYTE_ALTSOURCE (0x78 << LDST_SRCDST_SHIFT) | |
| 314 | #define LDST_SRCDST_WORD_INFO_FIFO (0x7a << LDST_SRCDST_SHIFT) | |
| 315 | ||
| 316 | /* Offset in source/destination */ | |
| 317 | #define LDST_OFFSET_SHIFT 8 | |
| 318 | #define LDST_OFFSET_MASK (0xff << LDST_OFFSET_SHIFT) | |
| 319 | ||
| 320 | /* LDOFF definitions used when DST = LDST_SRCDST_WORD_DECOCTRL */ | |
| 321 | /* These could also be shifted by LDST_OFFSET_SHIFT - this reads better */ | |
| 322 | #define LDOFF_CHG_SHARE_SHIFT 0 | |
| 323 | #define LDOFF_CHG_SHARE_MASK (0x3 << LDOFF_CHG_SHARE_SHIFT) | |
| 324 | #define LDOFF_CHG_SHARE_NEVER (0x1 << LDOFF_CHG_SHARE_SHIFT) | |
| 325 | #define LDOFF_CHG_SHARE_OK_PROP (0x2 << LDOFF_CHG_SHARE_SHIFT) | |
| 326 | #define LDOFF_CHG_SHARE_OK_NO_PROP (0x3 << LDOFF_CHG_SHARE_SHIFT) | |
| 327 | ||
| 328 | #define LDOFF_ENABLE_AUTO_NFIFO BIT(2) | |
| 329 | #define LDOFF_DISABLE_AUTO_NFIFO BIT(3) | |
| 330 | ||
| 331 | #define LDOFF_CHG_NONSEQLIODN_SHIFT 4 | |
| 332 | #define LDOFF_CHG_NONSEQLIODN_MASK (0x3 << LDOFF_CHG_NONSEQLIODN_SHIFT) | |
| 333 | #define LDOFF_CHG_NONSEQLIODN_SEQ (0x1 << LDOFF_CHG_NONSEQLIODN_SHIFT) | |
| 334 | #define LDOFF_CHG_NONSEQLIODN_NON_SEQ (0x2 << LDOFF_CHG_NONSEQLIODN_SHIFT) | |
| 335 | #define LDOFF_CHG_NONSEQLIODN_TRUSTED (0x3 << LDOFF_CHG_NONSEQLIODN_SHIFT) | |
| 336 | ||
| 337 | #define LDOFF_CHG_SEQLIODN_SHIFT 6 | |
| 338 | #define LDOFF_CHG_SEQLIODN_MASK (0x3 << LDOFF_CHG_SEQLIODN_SHIFT) | |
| 339 | #define LDOFF_CHG_SEQLIODN_SEQ (0x1 << LDOFF_CHG_SEQLIODN_SHIFT) | |
| 340 | #define LDOFF_CHG_SEQLIODN_NON_SEQ (0x2 << LDOFF_CHG_SEQLIODN_SHIFT) | |
| 341 | #define LDOFF_CHG_SEQLIODN_TRUSTED (0x3 << LDOFF_CHG_SEQLIODN_SHIFT) | |
| 342 | ||
| 343 | /* Data length in bytes */ | |
| 344 | #define LDST_LEN_SHIFT 0 | |
| 345 | #define LDST_LEN_MASK (0xff << LDST_LEN_SHIFT) | |
| 346 | ||
| 347 | /* Special Length definitions when dst=deco-ctrl */ | |
| 348 | #define LDLEN_ENABLE_OSL_COUNT BIT(7) | |
| 349 | #define LDLEN_RST_CHA_OFIFO_PTR BIT(6) | |
| 350 | #define LDLEN_RST_OFIFO BIT(5) | |
| 351 | #define LDLEN_SET_OFIFO_OFF_VALID BIT(4) | |
| 352 | #define LDLEN_SET_OFIFO_OFF_RSVD BIT(3) | |
| 353 | #define LDLEN_SET_OFIFO_OFFSET_SHIFT 0 | |
| 354 | #define LDLEN_SET_OFIFO_OFFSET_MASK (3 << LDLEN_SET_OFIFO_OFFSET_SHIFT) | |
| 355 | ||
| 356 | /* CCB Clear Written Register bits */ | |
| 357 | #define CLRW_CLR_C1MODE BIT(0) | |
| 358 | #define CLRW_CLR_C1DATAS BIT(2) | |
| 359 | #define CLRW_CLR_C1ICV BIT(3) | |
| 360 | #define CLRW_CLR_C1CTX BIT(5) | |
| 361 | #define CLRW_CLR_C1KEY BIT(6) | |
| 362 | #define CLRW_CLR_PK_A BIT(12) | |
| 363 | #define CLRW_CLR_PK_B BIT(13) | |
| 364 | #define CLRW_CLR_PK_N BIT(14) | |
| 365 | #define CLRW_CLR_PK_E BIT(15) | |
| 366 | #define CLRW_CLR_C2MODE BIT(16) | |
| 367 | #define CLRW_CLR_C2KEYS BIT(17) | |
| 368 | #define CLRW_CLR_C2DATAS BIT(18) | |
| 369 | #define CLRW_CLR_C2CTX BIT(21) | |
| 370 | #define CLRW_CLR_C2KEY BIT(22) | |
| 371 | #define CLRW_RESET_CLS2_DONE BIT(26) /* era 4 */ | |
| 372 | #define CLRW_RESET_CLS1_DONE BIT(27) /* era 4 */ | |
| 373 | #define CLRW_RESET_CLS2_CHA BIT(28) /* era 4 */ | |
| 374 | #define CLRW_RESET_CLS1_CHA BIT(29) /* era 4 */ | |
| 375 | #define CLRW_RESET_OFIFO BIT(30) /* era 3 */ | |
| 376 | #define CLRW_RESET_IFIFO_DFIFO BIT(31) /* era 3 */ | |
| 377 | ||
| 378 | /* CHA Control Register bits */ | |
| 379 | #define CCTRL_RESET_CHA_ALL BIT(0) | |
| 380 | #define CCTRL_RESET_CHA_AESA BIT(1) | |
| 381 | #define CCTRL_RESET_CHA_DESA BIT(2) | |
| 382 | #define CCTRL_RESET_CHA_AFHA BIT(3) | |
| 383 | #define CCTRL_RESET_CHA_KFHA BIT(4) | |
| 384 | #define CCTRL_RESET_CHA_SF8A BIT(5) | |
| 385 | #define CCTRL_RESET_CHA_PKHA BIT(6) | |
| 386 | #define CCTRL_RESET_CHA_MDHA BIT(7) | |
| 387 | #define CCTRL_RESET_CHA_CRCA BIT(8) | |
| 388 | #define CCTRL_RESET_CHA_RNG BIT(9) | |
| 389 | #define CCTRL_RESET_CHA_SF9A BIT(10) | |
| 390 | #define CCTRL_RESET_CHA_ZUCE BIT(11) | |
| 391 | #define CCTRL_RESET_CHA_ZUCA BIT(12) | |
| 392 | #define CCTRL_UNLOAD_PK_A0 BIT(16) | |
| 393 | #define CCTRL_UNLOAD_PK_A1 BIT(17) | |
| 394 | #define CCTRL_UNLOAD_PK_A2 BIT(18) | |
| 395 | #define CCTRL_UNLOAD_PK_A3 BIT(19) | |
| 396 | #define CCTRL_UNLOAD_PK_B0 BIT(20) | |
| 397 | #define CCTRL_UNLOAD_PK_B1 BIT(21) | |
| 398 | #define CCTRL_UNLOAD_PK_B2 BIT(22) | |
| 399 | #define CCTRL_UNLOAD_PK_B3 BIT(23) | |
| 400 | #define CCTRL_UNLOAD_PK_N BIT(24) | |
| 401 | #define CCTRL_UNLOAD_PK_A BIT(26) | |
| 402 | #define CCTRL_UNLOAD_PK_B BIT(27) | |
| 403 | #define CCTRL_UNLOAD_SBOX BIT(28) | |
| 404 | ||
| 405 | /* IRQ Control Register (CxCIRQ) bits */ | |
| 406 | #define CIRQ_ADI BIT(1) | |
| 407 | #define CIRQ_DDI BIT(2) | |
| 408 | #define CIRQ_RCDI BIT(3) | |
| 409 | #define CIRQ_KDI BIT(4) | |
| 410 | #define CIRQ_S8DI BIT(5) | |
| 411 | #define CIRQ_PDI BIT(6) | |
| 412 | #define CIRQ_MDI BIT(7) | |
| 413 | #define CIRQ_CDI BIT(8) | |
| 414 | #define CIRQ_RNDI BIT(9) | |
| 415 | #define CIRQ_S9DI BIT(10) | |
| 416 | #define CIRQ_ZEDI BIT(11) /* valid for Era 5 or higher */ | |
| 417 | #define CIRQ_ZADI BIT(12) /* valid for Era 5 or higher */ | |
| 418 | #define CIRQ_AEI BIT(17) | |
| 419 | #define CIRQ_DEI BIT(18) | |
| 420 | #define CIRQ_RCEI BIT(19) | |
| 421 | #define CIRQ_KEI BIT(20) | |
| 422 | #define CIRQ_S8EI BIT(21) | |
| 423 | #define CIRQ_PEI BIT(22) | |
| 424 | #define CIRQ_MEI BIT(23) | |
| 425 | #define CIRQ_CEI BIT(24) | |
| 426 | #define CIRQ_RNEI BIT(25) | |
| 427 | #define CIRQ_S9EI BIT(26) | |
| 428 | #define CIRQ_ZEEI BIT(27) /* valid for Era 5 or higher */ | |
| 429 | #define CIRQ_ZAEI BIT(28) /* valid for Era 5 or higher */ | |
| 430 | ||
| 431 | /* | |
| 432 | * FIFO_LOAD/FIFO_STORE/SEQ_FIFO_LOAD/SEQ_FIFO_STORE | |
| 433 | * Command Constructs | |
| 434 | */ | |
| 435 | ||
| 436 | /* | |
| 437 | * Load Destination: 0 = skip (SEQ_FIFO_LOAD only), | |
| 438 | * 1 = Load for Class1, 2 = Load for Class2, 3 = Load both | |
| 439 | * Store Source: 0 = normal, 1 = Class1key, 2 = Class2key | |
| 440 | */ | |
| 441 | #define FIFOLD_CLASS_SHIFT 25 | |
| 442 | #define FIFOLD_CLASS_MASK (0x03 << FIFOLD_CLASS_SHIFT) | |
| 443 | #define FIFOLD_CLASS_SKIP (0x00 << FIFOLD_CLASS_SHIFT) | |
| 444 | #define FIFOLD_CLASS_CLASS1 (0x01 << FIFOLD_CLASS_SHIFT) | |
| 445 | #define FIFOLD_CLASS_CLASS2 (0x02 << FIFOLD_CLASS_SHIFT) | |
| 446 | #define FIFOLD_CLASS_BOTH (0x03 << FIFOLD_CLASS_SHIFT) | |
| 447 | ||
| 448 | #define FIFOST_CLASS_SHIFT 25 | |
| 449 | #define FIFOST_CLASS_MASK (0x03 << FIFOST_CLASS_SHIFT) | |
| 450 | #define FIFOST_CLASS_NORMAL (0x00 << FIFOST_CLASS_SHIFT) | |
| 451 | #define FIFOST_CLASS_CLASS1KEY (0x01 << FIFOST_CLASS_SHIFT) | |
| 452 | #define FIFOST_CLASS_CLASS2KEY (0x02 << FIFOST_CLASS_SHIFT) | |
| 453 | #define FIFOST_CLASS_BOTH (0x03 << FIFOST_CLASS_SHIFT) | |
| 454 | ||
| 455 | /* | |
| 456 | * Scatter-Gather Table/Variable Length Field | |
| 457 | * If set for FIFO_LOAD, refers to a SG table. Within | |
| 458 | * SEQ_FIFO_LOAD, is variable input sequence | |
| 459 | */ | |
| 460 | #define FIFOLDST_SGF_SHIFT 24 | |
| 461 | #define FIFOLDST_SGF_MASK (1 << FIFOLDST_SGF_SHIFT) | |
| 462 | #define FIFOLDST_VLF_MASK (1 << FIFOLDST_SGF_SHIFT) | |
| 463 | #define FIFOLDST_SGF BIT(24) | |
| 464 | #define FIFOLDST_VLF BIT(24) | |
| 465 | ||
| 466 | /* | |
| 467 | * Immediate - Data follows command in descriptor | |
| 468 | * AIDF - Already in Input Data FIFO | |
| 469 | */ | |
| 470 | #define FIFOLD_IMM_SHIFT 23 | |
| 471 | #define FIFOLD_IMM_MASK (1 << FIFOLD_IMM_SHIFT) | |
| 472 | #define FIFOLD_AIDF_MASK (1 << FIFOLD_IMM_SHIFT) | |
| 473 | #define FIFOLD_IMM BIT(23) | |
| 474 | #define FIFOLD_AIDF BIT(23) | |
| 475 | ||
| 476 | #define FIFOST_IMM_SHIFT 23 | |
| 477 | #define FIFOST_IMM_MASK (1 << FIFOST_IMM_SHIFT) | |
| 478 | #define FIFOST_IMM BIT(23) | |
| 479 | ||
| 480 | /* Continue - Not the last FIFO store to come */ | |
| 481 | #define FIFOST_CONT_SHIFT 23 | |
| 482 | #define FIFOST_CONT_MASK (1 << FIFOST_CONT_SHIFT) | |
| 483 | #define FIFOST_CONT BIT(23) | |
| 484 | ||
| 485 | /* | |
| 486 | * Extended Length - use 32-bit extended length that | |
| 487 | * follows the pointer field. Illegal with IMM set | |
| 488 | */ | |
| 489 | #define FIFOLDST_EXT_SHIFT 22 | |
| 490 | #define FIFOLDST_EXT_MASK (1 << FIFOLDST_EXT_SHIFT) | |
| 491 | #define FIFOLDST_EXT BIT(22) | |
| 492 | ||
| 493 | /* Input data type.*/ | |
| 494 | #define FIFOLD_TYPE_SHIFT 16 | |
| 495 | #define FIFOLD_CONT_TYPE_SHIFT 19 /* shift past last-flush bits */ | |
| 496 | #define FIFOLD_TYPE_MASK (0x3f << FIFOLD_TYPE_SHIFT) | |
| 497 | ||
| 498 | /* PK types */ | |
| 499 | #define FIFOLD_TYPE_PK (0x00 << FIFOLD_TYPE_SHIFT) | |
| 500 | #define FIFOLD_TYPE_PK_MASK (0x30 << FIFOLD_TYPE_SHIFT) | |
| 501 | #define FIFOLD_TYPE_PK_TYPEMASK (0x0f << FIFOLD_TYPE_SHIFT) | |
| 502 | #define FIFOLD_TYPE_PK_A0 (0x00 << FIFOLD_TYPE_SHIFT) | |
| 503 | #define FIFOLD_TYPE_PK_A1 (0x01 << FIFOLD_TYPE_SHIFT) | |
| 504 | #define FIFOLD_TYPE_PK_A2 (0x02 << FIFOLD_TYPE_SHIFT) | |
| 505 | #define FIFOLD_TYPE_PK_A3 (0x03 << FIFOLD_TYPE_SHIFT) | |
| 506 | #define FIFOLD_TYPE_PK_B0 (0x04 << FIFOLD_TYPE_SHIFT) | |
| 507 | #define FIFOLD_TYPE_PK_B1 (0x05 << FIFOLD_TYPE_SHIFT) | |
| 508 | #define FIFOLD_TYPE_PK_B2 (0x06 << FIFOLD_TYPE_SHIFT) | |
| 509 | #define FIFOLD_TYPE_PK_B3 (0x07 << FIFOLD_TYPE_SHIFT) | |
| 510 | #define FIFOLD_TYPE_PK_N (0x08 << FIFOLD_TYPE_SHIFT) | |
| 511 | #define FIFOLD_TYPE_PK_A (0x0c << FIFOLD_TYPE_SHIFT) | |
| 512 | #define FIFOLD_TYPE_PK_B (0x0d << FIFOLD_TYPE_SHIFT) | |
| 513 | ||
| 514 | /* Other types. Need to OR in last/flush bits as desired */ | |
| 515 | #define FIFOLD_TYPE_MSG_MASK (0x38 << FIFOLD_TYPE_SHIFT) | |
| 516 | #define FIFOLD_TYPE_MSG (0x10 << FIFOLD_TYPE_SHIFT) | |
| 517 | #define FIFOLD_TYPE_MSG1OUT2 (0x18 << FIFOLD_TYPE_SHIFT) | |
| 518 | #define FIFOLD_TYPE_IV (0x20 << FIFOLD_TYPE_SHIFT) | |
| 519 | #define FIFOLD_TYPE_BITDATA (0x28 << FIFOLD_TYPE_SHIFT) | |
| 520 | #define FIFOLD_TYPE_AAD (0x30 << FIFOLD_TYPE_SHIFT) | |
| 521 | #define FIFOLD_TYPE_ICV (0x38 << FIFOLD_TYPE_SHIFT) | |
| 522 | ||
| 523 | /* Last/Flush bits for use with "other" types above */ | |
| 524 | #define FIFOLD_TYPE_ACT_MASK (0x07 << FIFOLD_TYPE_SHIFT) | |
| 525 | #define FIFOLD_TYPE_NOACTION (0x00 << FIFOLD_TYPE_SHIFT) | |
| 526 | #define FIFOLD_TYPE_FLUSH1 (0x01 << FIFOLD_TYPE_SHIFT) | |
| 527 | #define FIFOLD_TYPE_LAST1 (0x02 << FIFOLD_TYPE_SHIFT) | |
| 528 | #define FIFOLD_TYPE_LAST2FLUSH (0x03 << FIFOLD_TYPE_SHIFT) | |
| 529 | #define FIFOLD_TYPE_LAST2 (0x04 << FIFOLD_TYPE_SHIFT) | |
| 530 | #define FIFOLD_TYPE_LAST2FLUSH1 (0x05 << FIFOLD_TYPE_SHIFT) | |
| 531 | #define FIFOLD_TYPE_LASTBOTH (0x06 << FIFOLD_TYPE_SHIFT) | |
| 532 | #define FIFOLD_TYPE_LASTBOTHFL (0x07 << FIFOLD_TYPE_SHIFT) | |
| 533 | #define FIFOLD_TYPE_NOINFOFIFO (0x0f << FIFOLD_TYPE_SHIFT) | |
| 534 | ||
| 535 | #define FIFOLDST_LEN_MASK 0xffff | |
| 536 | #define FIFOLDST_EXT_LEN_MASK 0xffffffff | |
| 537 | ||
| 538 | /* Output data types */ | |
| 539 | #define FIFOST_TYPE_SHIFT 16 | |
| 540 | #define FIFOST_TYPE_MASK (0x3f << FIFOST_TYPE_SHIFT) | |
| 541 | ||
| 542 | #define FIFOST_TYPE_PKHA_A0 (0x00 << FIFOST_TYPE_SHIFT) | |
| 543 | #define FIFOST_TYPE_PKHA_A1 (0x01 << FIFOST_TYPE_SHIFT) | |
| 544 | #define FIFOST_TYPE_PKHA_A2 (0x02 << FIFOST_TYPE_SHIFT) | |
| 545 | #define FIFOST_TYPE_PKHA_A3 (0x03 << FIFOST_TYPE_SHIFT) | |
| 546 | #define FIFOST_TYPE_PKHA_B0 (0x04 << FIFOST_TYPE_SHIFT) | |
| 547 | #define FIFOST_TYPE_PKHA_B1 (0x05 << FIFOST_TYPE_SHIFT) | |
| 548 | #define FIFOST_TYPE_PKHA_B2 (0x06 << FIFOST_TYPE_SHIFT) | |
| 549 | #define FIFOST_TYPE_PKHA_B3 (0x07 << FIFOST_TYPE_SHIFT) | |
| 550 | #define FIFOST_TYPE_PKHA_N (0x08 << FIFOST_TYPE_SHIFT) | |
| 551 | #define FIFOST_TYPE_PKHA_A (0x0c << FIFOST_TYPE_SHIFT) | |
| 552 | #define FIFOST_TYPE_PKHA_B (0x0d << FIFOST_TYPE_SHIFT) | |
| 553 | #define FIFOST_TYPE_AF_SBOX_JKEK (0x20 << FIFOST_TYPE_SHIFT) | |
| 554 | #define FIFOST_TYPE_AF_SBOX_TKEK (0x21 << FIFOST_TYPE_SHIFT) | |
| 555 | #define FIFOST_TYPE_PKHA_E_JKEK (0x22 << FIFOST_TYPE_SHIFT) | |
| 556 | #define FIFOST_TYPE_PKHA_E_TKEK (0x23 << FIFOST_TYPE_SHIFT) | |
| 557 | #define FIFOST_TYPE_KEY_KEK (0x24 << FIFOST_TYPE_SHIFT) | |
| 558 | #define FIFOST_TYPE_KEY_TKEK (0x25 << FIFOST_TYPE_SHIFT) | |
| 559 | #define FIFOST_TYPE_SPLIT_KEK (0x26 << FIFOST_TYPE_SHIFT) | |
| 560 | #define FIFOST_TYPE_SPLIT_TKEK (0x27 << FIFOST_TYPE_SHIFT) | |
| 561 | #define FIFOST_TYPE_OUTFIFO_KEK (0x28 << FIFOST_TYPE_SHIFT) | |
| 562 | #define FIFOST_TYPE_OUTFIFO_TKEK (0x29 << FIFOST_TYPE_SHIFT) | |
| 563 | #define FIFOST_TYPE_MESSAGE_DATA (0x30 << FIFOST_TYPE_SHIFT) | |
| 564 | #define FIFOST_TYPE_MESSAGE_DATA2 (0x31 << FIFOST_TYPE_SHIFT) | |
| 565 | #define FIFOST_TYPE_RNGSTORE (0x34 << FIFOST_TYPE_SHIFT) | |
| 566 | #define FIFOST_TYPE_RNGFIFO (0x35 << FIFOST_TYPE_SHIFT) | |
| 567 | #define FIFOST_TYPE_METADATA (0x3e << FIFOST_TYPE_SHIFT) | |
| 568 | #define FIFOST_TYPE_SKIP (0x3f << FIFOST_TYPE_SHIFT) | |
| 569 | ||
| 570 | /* | |
| 571 | * OPERATION Command Constructs | |
| 572 | */ | |
| 573 | ||
| 574 | /* Operation type selectors - OP TYPE */ | |
| 575 | #define OP_TYPE_SHIFT 24 | |
| 576 | #define OP_TYPE_MASK (0x07 << OP_TYPE_SHIFT) | |
| 577 | ||
| 578 | #define OP_TYPE_UNI_PROTOCOL (0x00 << OP_TYPE_SHIFT) | |
| 579 | #define OP_TYPE_PK (0x01 << OP_TYPE_SHIFT) | |
| 580 | #define OP_TYPE_CLASS1_ALG (0x02 << OP_TYPE_SHIFT) | |
| 581 | #define OP_TYPE_CLASS2_ALG (0x04 << OP_TYPE_SHIFT) | |
| 582 | #define OP_TYPE_DECAP_PROTOCOL (0x06 << OP_TYPE_SHIFT) | |
| 583 | #define OP_TYPE_ENCAP_PROTOCOL (0x07 << OP_TYPE_SHIFT) | |
| 584 | ||
| 585 | /* ProtocolID selectors - PROTID */ | |
| 586 | #define OP_PCLID_SHIFT 16 | |
| 587 | #define OP_PCLID_MASK (0xff << OP_PCLID_SHIFT) | |
| 588 | ||
| 589 | /* Assuming OP_TYPE = OP_TYPE_UNI_PROTOCOL */ | |
| 590 | #define OP_PCLID_IKEV1_PRF (0x01 << OP_PCLID_SHIFT) | |
| 591 | #define OP_PCLID_IKEV2_PRF (0x02 << OP_PCLID_SHIFT) | |
| 592 | #define OP_PCLID_SSL30_PRF (0x08 << OP_PCLID_SHIFT) | |
| 593 | #define OP_PCLID_TLS10_PRF (0x09 << OP_PCLID_SHIFT) | |
| 594 | #define OP_PCLID_TLS11_PRF (0x0a << OP_PCLID_SHIFT) | |
| 595 | #define OP_PCLID_TLS12_PRF (0x0b << OP_PCLID_SHIFT) | |
| 9f95a23c | 596 | #define OP_PCLID_DTLS_PRF (0x0c << OP_PCLID_SHIFT) |
| 11fdf7f2 TL |
597 | #define OP_PCLID_PUBLICKEYPAIR (0x14 << OP_PCLID_SHIFT) |
| 598 | #define OP_PCLID_DSASIGN (0x15 << OP_PCLID_SHIFT) | |
| 599 | #define OP_PCLID_DSAVERIFY (0x16 << OP_PCLID_SHIFT) | |
| 600 | #define OP_PCLID_DIFFIEHELLMAN (0x17 << OP_PCLID_SHIFT) | |
| 601 | #define OP_PCLID_RSAENCRYPT (0x18 << OP_PCLID_SHIFT) | |
| 602 | #define OP_PCLID_RSADECRYPT (0x19 << OP_PCLID_SHIFT) | |
| 603 | #define OP_PCLID_DKP_MD5 (0x20 << OP_PCLID_SHIFT) | |
| 604 | #define OP_PCLID_DKP_SHA1 (0x21 << OP_PCLID_SHIFT) | |
| 605 | #define OP_PCLID_DKP_SHA224 (0x22 << OP_PCLID_SHIFT) | |
| 606 | #define OP_PCLID_DKP_SHA256 (0x23 << OP_PCLID_SHIFT) | |
| 607 | #define OP_PCLID_DKP_SHA384 (0x24 << OP_PCLID_SHIFT) | |
| 608 | #define OP_PCLID_DKP_SHA512 (0x25 << OP_PCLID_SHIFT) | |
| 609 | ||
| 610 | /* Assuming OP_TYPE = OP_TYPE_DECAP_PROTOCOL/ENCAP_PROTOCOL */ | |
| 611 | #define OP_PCLID_IPSEC (0x01 << OP_PCLID_SHIFT) | |
| 612 | #define OP_PCLID_SRTP (0x02 << OP_PCLID_SHIFT) | |
| 613 | #define OP_PCLID_MACSEC (0x03 << OP_PCLID_SHIFT) | |
| 614 | #define OP_PCLID_WIFI (0x04 << OP_PCLID_SHIFT) | |
| 615 | #define OP_PCLID_WIMAX (0x05 << OP_PCLID_SHIFT) | |
| 616 | #define OP_PCLID_SSL30 (0x08 << OP_PCLID_SHIFT) | |
| 617 | #define OP_PCLID_TLS10 (0x09 << OP_PCLID_SHIFT) | |
| 618 | #define OP_PCLID_TLS11 (0x0a << OP_PCLID_SHIFT) | |
| 619 | #define OP_PCLID_TLS12 (0x0b << OP_PCLID_SHIFT) | |
| 9f95a23c | 620 | #define OP_PCLID_DTLS (0x0c << OP_PCLID_SHIFT) |
| 11fdf7f2 TL |
621 | #define OP_PCLID_BLOB (0x0d << OP_PCLID_SHIFT) |
| 622 | #define OP_PCLID_IPSEC_NEW (0x11 << OP_PCLID_SHIFT) | |
| 623 | #define OP_PCLID_3G_DCRC (0x31 << OP_PCLID_SHIFT) | |
| 624 | #define OP_PCLID_3G_RLC_PDU (0x32 << OP_PCLID_SHIFT) | |
| 625 | #define OP_PCLID_3G_RLC_SDU (0x33 << OP_PCLID_SHIFT) | |
| 626 | #define OP_PCLID_LTE_PDCP_USER (0x42 << OP_PCLID_SHIFT) | |
| 627 | #define OP_PCLID_LTE_PDCP_CTRL (0x43 << OP_PCLID_SHIFT) | |
| 628 | #define OP_PCLID_LTE_PDCP_CTRL_MIXED (0x44 << OP_PCLID_SHIFT) | |
| f67539c2 | 629 | #define OP_PCLID_LTE_PDCP_USER_RN (0x45 << OP_PCLID_SHIFT) |
| 11fdf7f2 TL |
630 | |
| 631 | /* | |
| 632 | * ProtocolInfo selectors | |
| 633 | */ | |
| 634 | #define OP_PCLINFO_MASK 0xffff | |
| 635 | ||
| 636 | /* for OP_PCLID_IPSEC */ | |
| 637 | #define OP_PCL_IPSEC_CIPHER_MASK 0xff00 | |
| 638 | #define OP_PCL_IPSEC_AUTH_MASK 0x00ff | |
| 639 | ||
| 640 | #define OP_PCL_IPSEC_DES_IV64 0x0100 | |
| 641 | #define OP_PCL_IPSEC_DES 0x0200 | |
| 642 | #define OP_PCL_IPSEC_3DES 0x0300 | |
| 643 | #define OP_PCL_IPSEC_NULL 0x0B00 | |
| 644 | #define OP_PCL_IPSEC_AES_CBC 0x0c00 | |
| 645 | #define OP_PCL_IPSEC_AES_CTR 0x0d00 | |
| 646 | #define OP_PCL_IPSEC_AES_XTS 0x1600 | |
| 647 | #define OP_PCL_IPSEC_AES_CCM8 0x0e00 | |
| 648 | #define OP_PCL_IPSEC_AES_CCM12 0x0f00 | |
| 649 | #define OP_PCL_IPSEC_AES_CCM16 0x1000 | |
| 650 | #define OP_PCL_IPSEC_AES_GCM8 0x1200 | |
| 651 | #define OP_PCL_IPSEC_AES_GCM12 0x1300 | |
| 652 | #define OP_PCL_IPSEC_AES_GCM16 0x1400 | |
| 653 | #define OP_PCL_IPSEC_AES_NULL_WITH_GMAC 0x1500 | |
| 654 | ||
| 655 | #define OP_PCL_IPSEC_HMAC_NULL 0x0000 | |
| 656 | #define OP_PCL_IPSEC_HMAC_MD5_96 0x0001 | |
| 657 | #define OP_PCL_IPSEC_HMAC_SHA1_96 0x0002 | |
| 658 | #define OP_PCL_IPSEC_AES_XCBC_MAC_96 0x0005 | |
| 659 | #define OP_PCL_IPSEC_HMAC_MD5_128 0x0006 | |
| 660 | #define OP_PCL_IPSEC_HMAC_SHA1_160 0x0007 | |
| 661 | #define OP_PCL_IPSEC_AES_CMAC_96 0x0008 | |
| 662 | #define OP_PCL_IPSEC_HMAC_SHA2_256_128 0x000c | |
| 663 | #define OP_PCL_IPSEC_HMAC_SHA2_384_192 0x000d | |
| 664 | #define OP_PCL_IPSEC_HMAC_SHA2_512_256 0x000e | |
| 665 | ||
| 666 | /* For SRTP - OP_PCLID_SRTP */ | |
| 667 | #define OP_PCL_SRTP_CIPHER_MASK 0xff00 | |
| 668 | #define OP_PCL_SRTP_AUTH_MASK 0x00ff | |
| 669 | ||
| 670 | #define OP_PCL_SRTP_AES_CTR 0x0d00 | |
| 671 | ||
| 672 | #define OP_PCL_SRTP_HMAC_SHA1_160 0x0007 | |
| 673 | ||
| 9f95a23c TL |
674 | /* |
| 675 | * For SSL/TLS/DTLS - OP_PCL_TLS | |
| 676 | * For more details see IANA TLS Cipher Suite registry: | |
| 677 | * https://www.iana.org/assignments/tls-parameters/tls-parameters.xhtml | |
| 678 | * Note: for private/internal use (reserved by IANA) - OP_PCL_PVT_TLS | |
| 679 | */ | |
| 680 | #define OP_PCL_TLS_RSA_EXPORT_WITH_RC4_40_MD5 0x0003 | |
| 681 | #define OP_PCL_TLS_RSA_WITH_RC4_128_MD5 0x0004 | |
| 682 | #define OP_PCL_TLS_RSA_WITH_RC4_128_SHA 0x0005 | |
| 683 | #define OP_PCL_TLS_RSA_EXPORT_WITH_DES40_CBC_SHA 0x0008 | |
| 684 | #define OP_PCL_TLS_RSA_WITH_DES_CBC_SHA 0x0009 | |
| 685 | #define OP_PCL_TLS_RSA_WITH_3DES_EDE_CBC_SHA 0x000a | |
| 686 | #define OP_PCL_TLS_DH_DSS_EXPORT_WITH_DES40_CBC_SHA 0x000b | |
| 687 | #define OP_PCL_TLS_DH_DSS_WITH_DES_CBC_SHA 0x000c | |
| 688 | #define OP_PCL_TLS_DH_DSS_WITH_3DES_EDE_CBC_SHA 0x000d | |
| 689 | #define OP_PCL_TLS_DH_RSA_EXPORT_WITH_DES40_CBC_SHA 0x000e | |
| 690 | #define OP_PCL_TLS_DH_RSA_WITH_DES_CBC_SHA 0x000f | |
| 691 | #define OP_PCL_TLS_DH_RSA_WITH_3DES_EDE_CBC_SHA 0x0010 | |
| 692 | #define OP_PCL_TLS_DHE_DSS_EXPORT_WITH_DES40_CBC_SHA 0x0011 | |
| 693 | #define OP_PCL_TLS_DHE_DSS_WITH_DES_CBC_SHA 0x0012 | |
| 694 | #define OP_PCL_TLS_DHE_DSS_WITH_3DES_EDE_CBC_SHA 0x0013 | |
| 695 | #define OP_PCL_TLS_DHE_RSA_EXPORT_WITH_DES40_CBC_SHA 0x0014 | |
| 696 | #define OP_PCL_TLS_DHE_RSA_WITH_DES_CBC_SHA 0x0015 | |
| 697 | #define OP_PCL_TLS_DHE_RSA_WITH_3DES_EDE_CBC_SHA 0x0016 | |
| 698 | #define OP_PCL_TLS_DH_anon_EXPORT_WITH_RC4_40_MD5 0x0017 | |
| 699 | #define OP_PCL_TLS_DH_anon_WITH_RC4_128_MD5 0x0018 | |
| 700 | #define OP_PCL_TLS_DH_anon_EXPORT_WITH_DES40_CBC_SHA 0x0019 | |
| 701 | #define OP_PCL_TLS_DH_anon_WITH_DES_CBC_SHA 0x001a | |
| 702 | #define OP_PCL_TLS_DH_anon_WITH_3DES_EDE_CBC_SHA 0x001b | |
| 703 | #define OP_PCL_TLS_KRB5_WITH_DES_CBC_SHA 0x001e | |
| 704 | #define OP_PCL_TLS_KRB5_WITH_3DES_EDE_CBC_SHA 0x001f | |
| 705 | #define OP_PCL_TLS_KRB5_WITH_RC4_128_SHA 0x0020 | |
| 706 | #define OP_PCL_TLS_KRB5_WITH_3DES_EDE_CBC_MD5 0x0023 | |
| 707 | #define OP_PCL_TLS_KRB5_WITH_DES_CBC_MD5 0x0022 | |
| 708 | #define OP_PCL_TLS_KRB5_WITH_RC4_128_MD5 0x0024 | |
| 709 | #define OP_PCL_TLS_KRB5_EXPORT_WITH_DES_CBC_40_SHA 0x0026 | |
| 710 | #define OP_PCL_TLS_KRB5_EXPORT_WITH_RC4_40_SHA 0x0028 | |
| 711 | #define OP_PCL_TLS_KRB5_EXPORT_WITH_DES_CBC_40_MD5 0x0029 | |
| 712 | #define OP_PCL_TLS_KRB5_EXPORT_WITH_RC4_40_MD5 0x002b | |
| 713 | #define OP_PCL_TLS_RSA_WITH_AES_128_CBC_SHA 0x002f | |
| 714 | #define OP_PCL_TLS_DH_DSS_WITH_AES_128_CBC_SHA 0x0030 | |
| 715 | #define OP_PCL_TLS_DH_RSA_WITH_AES_128_CBC_SHA 0x0031 | |
| 716 | #define OP_PCL_TLS_DHE_DSS_WITH_AES_128_CBC_SHA 0x0032 | |
| 717 | #define OP_PCL_TLS_DHE_RSA_WITH_AES_128_CBC_SHA 0x0033 | |
| 718 | #define OP_PCL_TLS_DH_anon_WITH_AES_128_CBC_SHA 0x0034 | |
| 719 | #define OP_PCL_TLS_RSA_WITH_AES_256_CBC_SHA 0x0035 | |
| 720 | #define OP_PCL_TLS_DH_DSS_WITH_AES_256_CBC_SHA 0x0036 | |
| 721 | #define OP_PCL_TLS_DH_RSA_WITH_AES_256_CBC_SHA 0x0037 | |
| 722 | #define OP_PCL_TLS_DHE_DSS_WITH_AES_256_CBC_SHA 0x0038 | |
| 723 | #define OP_PCL_TLS_DHE_RSA_WITH_AES_256_CBC_SHA 0x0039 | |
| 724 | #define OP_PCL_TLS_DH_anon_WITH_AES_256_CBC_SHA 0x003a | |
| 725 | #define OP_PCL_TLS_RSA_WITH_AES_128_CBC_SHA256 0x003c | |
| 726 | #define OP_PCL_TLS_RSA_WITH_AES_256_CBC_SHA256 0x003d | |
| 727 | #define OP_PCL_TLS_DH_DSS_WITH_AES_128_CBC_SHA256 0x003e | |
| 728 | #define OP_PCL_TLS_DH_RSA_WITH_AES_128_CBC_SHA256 0x003f | |
| 729 | #define OP_PCL_TLS_DHE_DSS_WITH_AES_128_CBC_SHA256 0x0040 | |
| 730 | #define OP_PCL_TLS_DHE_RSA_WITH_AES_128_CBC_SHA256 0x0067 | |
| 731 | #define OP_PCL_TLS_DH_DSS_WITH_AES_256_CBC_SHA256 0x0068 | |
| 732 | #define OP_PCL_TLS_DH_RSA_WITH_AES_256_CBC_SHA256 0x0069 | |
| 733 | #define OP_PCL_TLS_DHE_DSS_WITH_AES_256_CBC_SHA256 0x006a | |
| 734 | #define OP_PCL_TLS_DHE_RSA_WITH_AES_256_CBC_SHA256 0x006b | |
| 735 | #define OP_PCL_TLS_DH_anon_WITH_AES_128_CBC_SHA256 0x006c | |
| 736 | #define OP_PCL_TLS_DH_anon_WITH_AES_256_CBC_SHA256 0x006d | |
| 737 | #define OP_PCL_TLS_PSK_WITH_RC4_128_SHA 0x008a | |
| 738 | #define OP_PCL_TLS_PSK_WITH_3DES_EDE_CBC_SHA 0x008b | |
| 739 | #define OP_PCL_TLS_PSK_WITH_AES_128_CBC_SHA 0x008c | |
| 740 | #define OP_PCL_TLS_PSK_WITH_AES_256_CBC_SHA 0x008d | |
| 741 | #define OP_PCL_TLS_DHE_PSK_WITH_RC4_128_SHA 0x008e | |
| 742 | #define OP_PCL_TLS_DHE_PSK_WITH_3DES_EDE_CBC_SHA 0x008f | |
| 743 | #define OP_PCL_TLS_DHE_PSK_WITH_AES_128_CBC_SHA 0x0090 | |
| 744 | #define OP_PCL_TLS_DHE_PSK_WITH_AES_256_CBC_SHA 0x0091 | |
| 745 | #define OP_PCL_TLS_RSA_PSK_WITH_RC4_128_SHA 0x0092 | |
| 746 | #define OP_PCL_TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA 0x0093 | |
| 747 | #define OP_PCL_TLS_RSA_PSK_WITH_AES_128_CBC_SHA 0x0094 | |
| 748 | #define OP_PCL_TLS_RSA_PSK_WITH_AES_256_CBC_SHA 0x0095 | |
| 749 | #define OP_PCL_TLS_RSA_WITH_AES_128_GCM_SHA256 0x009c | |
| 750 | #define OP_PCL_TLS_RSA_WITH_AES_256_GCM_SHA384 0x009d | |
| 751 | #define OP_PCL_TLS_DHE_RSA_WITH_AES_128_GCM_SHA256 0x009e | |
| 752 | #define OP_PCL_TLS_DHE_RSA_WITH_AES_256_GCM_SHA384 0x009f | |
| 753 | #define OP_PCL_TLS_DH_RSA_WITH_AES_128_GCM_SHA256 0x00a0 | |
| 754 | #define OP_PCL_TLS_DH_RSA_WITH_AES_256_GCM_SHA384 0x00a1 | |
| 755 | #define OP_PCL_TLS_DHE_DSS_WITH_AES_128_GCM_SHA256 0x00a2 | |
| 756 | #define OP_PCL_TLS_DHE_DSS_WITH_AES_256_GCM_SHA384 0x00a3 | |
| 757 | #define OP_PCL_TLS_DH_DSS_WITH_AES_128_GCM_SHA256 0x00a4 | |
| 758 | #define OP_PCL_TLS_DH_DSS_WITH_AES_256_GCM_SHA384 0x00a5 | |
| 759 | #define OP_PCL_TLS_DH_anon_WITH_AES_128_GCM_SHA256 0x00a6 | |
| 760 | #define OP_PCL_TLS_DH_anon_WITH_AES_256_GCM_SHA384 0x00a7 | |
| 761 | #define OP_PCL_TLS_PSK_WITH_AES_128_GCM_SHA256 0x00a8 | |
| 762 | #define OP_PCL_TLS_PSK_WITH_AES_256_GCM_SHA384 0x00a9 | |
| 763 | #define OP_PCL_TLS_DHE_PSK_WITH_AES_128_GCM_SHA256 0x00aa | |
| 764 | #define OP_PCL_TLS_DHE_PSK_WITH_AES_256_GCM_SHA384 0x00ab | |
| 765 | #define OP_PCL_TLS_RSA_PSK_WITH_AES_128_GCM_SHA256 0x00ac | |
| 766 | #define OP_PCL_TLS_RSA_PSK_WITH_AES_256_GCM_SHA384 0x00ad | |
| 767 | #define OP_PCL_TLS_PSK_WITH_AES_128_CBC_SHA256 0x00ae | |
| 768 | #define OP_PCL_TLS_PSK_WITH_AES_256_CBC_SHA384 0x00af | |
| 769 | #define OP_PCL_TLS_DHE_PSK_WITH_AES_128_CBC_SHA256 0x00b2 | |
| 770 | #define OP_PCL_TLS_DHE_PSK_WITH_AES_256_CBC_SHA384 0x00b3 | |
| 771 | #define OP_PCL_TLS_RSA_PSK_WITH_AES_128_CBC_SHA256 0x00b6 | |
| 772 | #define OP_PCL_TLS_RSA_PSK_WITH_AES_256_CBC_SHA384 0x00b7 | |
| 773 | #define OP_PCL_TLS_ECDH_ECDSA_WITH_RC4_128_SHA 0xc002 | |
| 774 | #define OP_PCL_TLS_ECDH_ECDSA_WITH_3DES_EDE_CBC_SHA 0xc003 | |
| 775 | #define OP_PCL_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA 0xc004 | |
| 776 | #define OP_PCL_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA 0xc005 | |
| 777 | #define OP_PCL_TLS_ECDHE_ECDSA_WITH_RC4_128_SHA 0xc007 | |
| 778 | #define OP_PCL_TLS_ECDHE_ECDSA_WITH_3DES_EDE_CBC_SHA 0xc008 | |
| 779 | #define OP_PCL_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA 0xc009 | |
| 780 | #define OP_PCL_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA 0xc00a | |
| 781 | #define OP_PCL_TLS_ECDH_RSA_WITH_RC4_128_SHA 0xc00c | |
| 782 | #define OP_PCL_TLS_ECDH_RSA_WITH_3DES_EDE_CBC_SHA 0xc00d | |
| 783 | #define OP_PCL_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA 0xc00e | |
| 784 | #define OP_PCL_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA 0xc00f | |
| 785 | #define OP_PCL_TLS_ECDHE_RSA_WITH_RC4_128_SHA 0xc011 | |
| 786 | #define OP_PCL_TLS_ECDHE_RSA_WITH_3DES_EDE_CBC_SHA 0xc012 | |
| 787 | #define OP_PCL_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA 0xc013 | |
| 788 | #define OP_PCL_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA 0xc014 | |
| 789 | #define OP_PCL_TLS_ECDH_anon_WITH_RC4_128_SHA 0xc016 | |
| 790 | #define OP_PCL_TLS_ECDH_anon_WITH_3DES_EDE_CBC_SHA 0xc017 | |
| 791 | #define OP_PCL_TLS_ECDH_anon_WITH_AES_128_CBC_SHA 0xc018 | |
| 792 | #define OP_PCL_TLS_ECDH_anon_WITH_AES_256_CBC_SHA 0xc019 | |
| 793 | #define OP_PCL_TLS_SRP_SHA_WITH_3DES_EDE_CBC_SHA 0xc01a | |
| 794 | #define OP_PCL_TLS_SRP_SHA_RSA_WITH_3DES_EDE_CBC_SHA 0xc01b | |
| 795 | #define OP_PCL_TLS_SRP_SHA_DSS_WITH_3DES_EDE_CBC_SHA 0xc01c | |
| 796 | #define OP_PCL_TLS_SRP_SHA_WITH_AES_128_CBC_SHA 0xc01d | |
| 797 | #define OP_PCL_TLS_SRP_SHA_RSA_WITH_AES_128_CBC_SHA 0xc01e | |
| 798 | #define OP_PCL_TLS_SRP_SHA_DSS_WITH_AES_128_CBC_SHA 0xc01f | |
| 799 | #define OP_PCL_TLS_SRP_SHA_WITH_AES_256_CBC_SHA 0xc020 | |
| 800 | #define OP_PCL_TLS_SRP_SHA_RSA_WITH_AES_256_CBC_SHA 0xc021 | |
| 801 | #define OP_PCL_TLS_SRP_SHA_DSS_WITH_AES_256_CBC_SHA 0xc022 | |
| 802 | #define OP_PCL_TLS_ECDHE_ECDSA_WITH_AES_128_CBC_SHA256 0xc023 | |
| 803 | #define OP_PCL_TLS_ECDHE_ECDSA_WITH_AES_256_CBC_SHA384 0xc024 | |
| 804 | #define OP_PCL_TLS_ECDH_ECDSA_WITH_AES_128_CBC_SHA256 0xc025 | |
| 805 | #define OP_PCL_TLS_ECDH_ECDSA_WITH_AES_256_CBC_SHA384 0xc026 | |
| 806 | #define OP_PCL_TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256 0xc027 | |
| 807 | #define OP_PCL_TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384 0xc028 | |
| 808 | #define OP_PCL_TLS_ECDH_RSA_WITH_AES_128_CBC_SHA256 0xc029 | |
| 809 | #define OP_PCL_TLS_ECDH_RSA_WITH_AES_256_CBC_SHA384 0xc02a | |
| 810 | #define OP_PCL_TLS_ECDHE_ECDSA_WITH_AES_128_GCM_SHA256 0xc02b | |
| 811 | #define OP_PCL_TLS_ECDHE_ECDSA_WITH_AES_256_GCM_SHA384 0xc02c | |
| 812 | #define OP_PCL_TLS_ECDH_ECDSA_WITH_AES_128_GCM_SHA256 0xc02d | |
| 813 | #define OP_PCL_TLS_ECDH_ECDSA_WITH_AES_256_GCM_SHA384 0xc02e | |
| 814 | #define OP_PCL_TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 0xc02f | |
| 815 | #define OP_PCL_TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 0xc030 | |
| 816 | #define OP_PCL_TLS_ECDH_RSA_WITH_AES_128_GCM_SHA256 0xc031 | |
| 817 | #define OP_PCL_TLS_ECDH_RSA_WITH_AES_256_GCM_SHA384 0xc032 | |
| 818 | #define OP_PCL_TLS_ECDHE_PSK_WITH_RC4_128_SHA 0xc033 | |
| 819 | #define OP_PCL_TLS_ECDHE_PSK_WITH_3DES_EDE_CBC_SHA 0xc034 | |
| 820 | #define OP_PCL_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA 0xc035 | |
| 821 | #define OP_PCL_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA 0xc036 | |
| 822 | #define OP_PCL_TLS_ECDHE_PSK_WITH_AES_128_CBC_SHA256 0xc037 | |
| 823 | #define OP_PCL_TLS_ECDHE_PSK_WITH_AES_256_CBC_SHA384 0xc038 | |
| 824 | #define OP_PCL_PVT_TLS_3DES_EDE_CBC_MD5 0xff23 | |
| 825 | #define OP_PCL_PVT_TLS_3DES_EDE_CBC_SHA160 0xff30 | |
| 826 | #define OP_PCL_PVT_TLS_3DES_EDE_CBC_SHA384 0xff33 | |
| 827 | #define OP_PCL_PVT_TLS_3DES_EDE_CBC_SHA224 0xff34 | |
| 828 | #define OP_PCL_PVT_TLS_3DES_EDE_CBC_SHA512 0xff35 | |
| 829 | #define OP_PCL_PVT_TLS_3DES_EDE_CBC_SHA256 0xff36 | |
| 830 | #define OP_PCL_PVT_TLS_AES_256_CBC_SHA160 0xff60 | |
| 831 | #define OP_PCL_PVT_TLS_AES_256_CBC_SHA384 0xff63 | |
| 832 | #define OP_PCL_PVT_TLS_AES_256_CBC_SHA224 0xff64 | |
| 833 | #define OP_PCL_PVT_TLS_AES_256_CBC_SHA512 0xff65 | |
| 834 | #define OP_PCL_PVT_TLS_AES_256_CBC_SHA256 0xff66 | |
| 835 | #define OP_PCL_PVT_TLS_AES_128_CBC_SHA160 0xff80 | |
| 836 | #define OP_PCL_PVT_TLS_AES_128_CBC_SHA384 0xff83 | |
| 837 | #define OP_PCL_PVT_TLS_AES_128_CBC_SHA224 0xff84 | |
| 838 | #define OP_PCL_PVT_TLS_AES_128_CBC_SHA512 0xff85 | |
| 839 | #define OP_PCL_PVT_TLS_AES_128_CBC_SHA256 0xff86 | |
| 840 | #define OP_PCL_PVT_TLS_AES_192_CBC_SHA160 0xff90 | |
| 841 | #define OP_PCL_PVT_TLS_AES_192_CBC_SHA384 0xff93 | |
| 842 | #define OP_PCL_PVT_TLS_AES_192_CBC_SHA224 0xff94 | |
| 843 | #define OP_PCL_PVT_TLS_AES_192_CBC_SHA512 0xff95 | |
| 844 | #define OP_PCL_PVT_TLS_AES_192_CBC_SHA256 0xff96 | |
| 845 | #define OP_PCL_PVT_TLS_MASTER_SECRET_PRF_FE 0xfffe | |
| 846 | #define OP_PCL_PVT_TLS_MASTER_SECRET_PRF_FF 0xffff | |
| 11fdf7f2 TL |
847 | |
| 848 | /* 802.16 WiMAX protinfos */ | |
| 849 | #define OP_PCL_WIMAX_OFDM 0x0201 | |
| 850 | #define OP_PCL_WIMAX_OFDMA 0x0231 | |
| 851 | ||
| 852 | /* 802.11 WiFi protinfos */ | |
| 853 | #define OP_PCL_WIFI 0xac04 | |
| 854 | ||
| 855 | /* MacSec protinfos */ | |
| 856 | #define OP_PCL_MACSEC 0x0001 | |
| 857 | ||
| 858 | /* 3G DCRC protinfos */ | |
| 859 | #define OP_PCL_3G_DCRC_CRC7 0x0710 | |
| 860 | #define OP_PCL_3G_DCRC_CRC11 0x0B10 | |
| 861 | ||
| 862 | /* 3G RLC protinfos */ | |
| 863 | #define OP_PCL_3G_RLC_NULL 0x0000 | |
| 864 | #define OP_PCL_3G_RLC_KASUMI 0x0001 | |
| 865 | #define OP_PCL_3G_RLC_SNOW 0x0002 | |
| 866 | ||
| 867 | /* LTE protinfos */ | |
| 868 | #define OP_PCL_LTE_NULL 0x0000 | |
| 869 | #define OP_PCL_LTE_SNOW 0x0001 | |
| 870 | #define OP_PCL_LTE_AES 0x0002 | |
| 871 | #define OP_PCL_LTE_ZUC 0x0003 | |
| 872 | ||
| 873 | /* LTE mixed protinfos */ | |
| 874 | #define OP_PCL_LTE_MIXED_AUTH_SHIFT 0 | |
| 875 | #define OP_PCL_LTE_MIXED_AUTH_MASK (3 << OP_PCL_LTE_MIXED_AUTH_SHIFT) | |
| 876 | #define OP_PCL_LTE_MIXED_ENC_SHIFT 8 | |
| 9f95a23c | 877 | #define OP_PCL_LTE_MIXED_ENC_MASK (3 << OP_PCL_LTE_MIXED_ENC_SHIFT) |
| 11fdf7f2 TL |
878 | #define OP_PCL_LTE_MIXED_AUTH_NULL (OP_PCL_LTE_NULL << \ |
| 879 | OP_PCL_LTE_MIXED_AUTH_SHIFT) | |
| 880 | #define OP_PCL_LTE_MIXED_AUTH_SNOW (OP_PCL_LTE_SNOW << \ | |
| 881 | OP_PCL_LTE_MIXED_AUTH_SHIFT) | |
| 882 | #define OP_PCL_LTE_MIXED_AUTH_AES (OP_PCL_LTE_AES << \ | |
| 883 | OP_PCL_LTE_MIXED_AUTH_SHIFT) | |
| 884 | #define OP_PCL_LTE_MIXED_AUTH_ZUC (OP_PCL_LTE_ZUC << \ | |
| 885 | OP_PCL_LTE_MIXED_AUTH_SHIFT) | |
| 886 | #define OP_PCL_LTE_MIXED_ENC_NULL (OP_PCL_LTE_NULL << \ | |
| 887 | OP_PCL_LTE_MIXED_ENC_SHIFT) | |
| 888 | #define OP_PCL_LTE_MIXED_ENC_SNOW (OP_PCL_LTE_SNOW << \ | |
| 889 | OP_PCL_LTE_MIXED_ENC_SHIFT) | |
| 890 | #define OP_PCL_LTE_MIXED_ENC_AES (OP_PCL_LTE_AES << \ | |
| 891 | OP_PCL_LTE_MIXED_ENC_SHIFT) | |
| 892 | #define OP_PCL_LTE_MIXED_ENC_ZUC (OP_PCL_LTE_ZUC << \ | |
| 893 | OP_PCL_LTE_MIXED_ENC_SHIFT) | |
| 894 | ||
| 895 | /* PKI unidirectional protocol protinfo bits */ | |
| 896 | #define OP_PCL_PKPROT_DSA_MSG BIT(10) | |
| 897 | #define OP_PCL_PKPROT_HASH_SHIFT 7 | |
| 898 | #define OP_PCL_PKPROT_HASH_MASK (7 << OP_PCL_PKPROT_HASH_SHIFT) | |
| 899 | #define OP_PCL_PKPROT_HASH_MD5 (0 << OP_PCL_PKPROT_HASH_SHIFT) | |
| 900 | #define OP_PCL_PKPROT_HASH_SHA1 (1 << OP_PCL_PKPROT_HASH_SHIFT) | |
| 901 | #define OP_PCL_PKPROT_HASH_SHA224 (2 << OP_PCL_PKPROT_HASH_SHIFT) | |
| 902 | #define OP_PCL_PKPROT_HASH_SHA256 (3 << OP_PCL_PKPROT_HASH_SHIFT) | |
| 903 | #define OP_PCL_PKPROT_HASH_SHA384 (4 << OP_PCL_PKPROT_HASH_SHIFT) | |
| 904 | #define OP_PCL_PKPROT_HASH_SHA512 (5 << OP_PCL_PKPROT_HASH_SHIFT) | |
| 905 | #define OP_PCL_PKPROT_EKT_Z BIT(6) | |
| 906 | #define OP_PCL_PKPROT_DECRYPT_Z BIT(5) | |
| 907 | #define OP_PCL_PKPROT_EKT_PRI BIT(4) | |
| 908 | #define OP_PCL_PKPROT_TEST BIT(3) | |
| 909 | #define OP_PCL_PKPROT_DECRYPT_PRI BIT(2) | |
| 910 | #define OP_PCL_PKPROT_ECC BIT(1) | |
| 911 | #define OP_PCL_PKPROT_F2M BIT(0) | |
| 912 | ||
| 913 | /* Blob protinfos */ | |
| 914 | #define OP_PCL_BLOB_TKEK_SHIFT 9 | |
| 915 | #define OP_PCL_BLOB_TKEK BIT(9) | |
| 916 | #define OP_PCL_BLOB_EKT_SHIFT 8 | |
| 917 | #define OP_PCL_BLOB_EKT BIT(8) | |
| 918 | #define OP_PCL_BLOB_REG_SHIFT 4 | |
| 919 | #define OP_PCL_BLOB_REG_MASK (0xF << OP_PCL_BLOB_REG_SHIFT) | |
| 920 | #define OP_PCL_BLOB_REG_MEMORY (0x0 << OP_PCL_BLOB_REG_SHIFT) | |
| 921 | #define OP_PCL_BLOB_REG_KEY1 (0x1 << OP_PCL_BLOB_REG_SHIFT) | |
| 922 | #define OP_PCL_BLOB_REG_KEY2 (0x3 << OP_PCL_BLOB_REG_SHIFT) | |
| 923 | #define OP_PCL_BLOB_AFHA_SBOX (0x5 << OP_PCL_BLOB_REG_SHIFT) | |
| 924 | #define OP_PCL_BLOB_REG_SPLIT (0x7 << OP_PCL_BLOB_REG_SHIFT) | |
| 925 | #define OP_PCL_BLOB_REG_PKE (0x9 << OP_PCL_BLOB_REG_SHIFT) | |
| 926 | #define OP_PCL_BLOB_SEC_MEM_SHIFT 3 | |
| 927 | #define OP_PCL_BLOB_SEC_MEM BIT(3) | |
| 928 | #define OP_PCL_BLOB_BLACK BIT(2) | |
| 929 | #define OP_PCL_BLOB_FORMAT_SHIFT 0 | |
| 930 | #define OP_PCL_BLOB_FORMAT_MASK 0x3 | |
| 931 | #define OP_PCL_BLOB_FORMAT_NORMAL 0 | |
| 932 | #define OP_PCL_BLOB_FORMAT_MASTER_VER 2 | |
| 933 | #define OP_PCL_BLOB_FORMAT_TEST 3 | |
| 934 | ||
| 935 | /* IKE / IKEv2 protinfos */ | |
| 936 | #define OP_PCL_IKE_HMAC_MD5 0x0100 | |
| 937 | #define OP_PCL_IKE_HMAC_SHA1 0x0200 | |
| 938 | #define OP_PCL_IKE_HMAC_AES128_CBC 0x0400 | |
| 939 | #define OP_PCL_IKE_HMAC_SHA256 0x0500 | |
| 940 | #define OP_PCL_IKE_HMAC_SHA384 0x0600 | |
| 941 | #define OP_PCL_IKE_HMAC_SHA512 0x0700 | |
| 942 | #define OP_PCL_IKE_HMAC_AES128_CMAC 0x0800 | |
| 943 | ||
| 944 | /* PKI unidirectional protocol protinfo bits */ | |
| 945 | #define OP_PCL_PKPROT_TEST BIT(3) | |
| 946 | #define OP_PCL_PKPROT_DECRYPT BIT(2) | |
| 947 | #define OP_PCL_PKPROT_ECC BIT(1) | |
| 948 | #define OP_PCL_PKPROT_F2M BIT(0) | |
| 949 | ||
| 950 | /* RSA Protinfo */ | |
| 951 | #define OP_PCL_RSAPROT_OP_MASK 3 | |
| 952 | #define OP_PCL_RSAPROT_OP_ENC_F_IN 0 | |
| 953 | #define OP_PCL_RSAPROT_OP_ENC_F_OUT 1 | |
| 954 | #define OP_PCL_RSAPROT_OP_DEC_ND 0 | |
| 955 | #define OP_PCL_RSAPROT_OP_DEC_PQD 1 | |
| 956 | #define OP_PCL_RSAPROT_OP_DEC_PQDPDQC 2 | |
| 957 | #define OP_PCL_RSAPROT_FFF_SHIFT 4 | |
| 958 | #define OP_PCL_RSAPROT_FFF_MASK (7 << OP_PCL_RSAPROT_FFF_SHIFT) | |
| 959 | #define OP_PCL_RSAPROT_FFF_RED (0 << OP_PCL_RSAPROT_FFF_SHIFT) | |
| 960 | #define OP_PCL_RSAPROT_FFF_ENC (1 << OP_PCL_RSAPROT_FFF_SHIFT) | |
| 961 | #define OP_PCL_RSAPROT_FFF_TK_ENC (5 << OP_PCL_RSAPROT_FFF_SHIFT) | |
| 962 | #define OP_PCL_RSAPROT_FFF_EKT (3 << OP_PCL_RSAPROT_FFF_SHIFT) | |
| 963 | #define OP_PCL_RSAPROT_FFF_TK_EKT (7 << OP_PCL_RSAPROT_FFF_SHIFT) | |
| 964 | #define OP_PCL_RSAPROT_PPP_SHIFT 8 | |
| 965 | #define OP_PCL_RSAPROT_PPP_MASK (7 << OP_PCL_RSAPROT_PPP_SHIFT) | |
| 966 | #define OP_PCL_RSAPROT_PPP_RED (0 << OP_PCL_RSAPROT_PPP_SHIFT) | |
| 967 | #define OP_PCL_RSAPROT_PPP_ENC (1 << OP_PCL_RSAPROT_PPP_SHIFT) | |
| 968 | #define OP_PCL_RSAPROT_PPP_TK_ENC (5 << OP_PCL_RSAPROT_PPP_SHIFT) | |
| 969 | #define OP_PCL_RSAPROT_PPP_EKT (3 << OP_PCL_RSAPROT_PPP_SHIFT) | |
| 970 | #define OP_PCL_RSAPROT_PPP_TK_EKT (7 << OP_PCL_RSAPROT_PPP_SHIFT) | |
| 971 | #define OP_PCL_RSAPROT_FMT_PKCSV15 BIT(12) | |
| 972 | ||
| 973 | /* Derived Key Protocol (DKP) Protinfo */ | |
| 974 | #define OP_PCL_DKP_SRC_SHIFT 14 | |
| 975 | #define OP_PCL_DKP_SRC_MASK (3 << OP_PCL_DKP_SRC_SHIFT) | |
| 976 | #define OP_PCL_DKP_SRC_IMM (0 << OP_PCL_DKP_SRC_SHIFT) | |
| 977 | #define OP_PCL_DKP_SRC_SEQ (1 << OP_PCL_DKP_SRC_SHIFT) | |
| 978 | #define OP_PCL_DKP_SRC_PTR (2 << OP_PCL_DKP_SRC_SHIFT) | |
| 979 | #define OP_PCL_DKP_SRC_SGF (3 << OP_PCL_DKP_SRC_SHIFT) | |
| 980 | #define OP_PCL_DKP_DST_SHIFT 12 | |
| 981 | #define OP_PCL_DKP_DST_MASK (3 << OP_PCL_DKP_DST_SHIFT) | |
| 982 | #define OP_PCL_DKP_DST_IMM (0 << OP_PCL_DKP_DST_SHIFT) | |
| 983 | #define OP_PCL_DKP_DST_SEQ (1 << OP_PCL_DKP_DST_SHIFT) | |
| 984 | #define OP_PCL_DKP_DST_PTR (2 << OP_PCL_DKP_DST_SHIFT) | |
| 985 | #define OP_PCL_DKP_DST_SGF (3 << OP_PCL_DKP_DST_SHIFT) | |
| 986 | #define OP_PCL_DKP_KEY_SHIFT 0 | |
| 987 | #define OP_PCL_DKP_KEY_MASK (0xfff << OP_PCL_DKP_KEY_SHIFT) | |
| 988 | ||
| 989 | /* For non-protocol/alg-only op commands */ | |
| 990 | #define OP_ALG_TYPE_SHIFT 24 | |
| 991 | #define OP_ALG_TYPE_MASK (0x7 << OP_ALG_TYPE_SHIFT) | |
| 992 | #define OP_ALG_TYPE_CLASS1 (0x2 << OP_ALG_TYPE_SHIFT) | |
| 993 | #define OP_ALG_TYPE_CLASS2 (0x4 << OP_ALG_TYPE_SHIFT) | |
| 994 | ||
| 995 | #define OP_ALG_ALGSEL_SHIFT 16 | |
| 996 | #define OP_ALG_ALGSEL_MASK (0xff << OP_ALG_ALGSEL_SHIFT) | |
| 997 | #define OP_ALG_ALGSEL_SUBMASK (0x0f << OP_ALG_ALGSEL_SHIFT) | |
| 998 | #define OP_ALG_ALGSEL_AES (0x10 << OP_ALG_ALGSEL_SHIFT) | |
| 999 | #define OP_ALG_ALGSEL_DES (0x20 << OP_ALG_ALGSEL_SHIFT) | |
| 1000 | #define OP_ALG_ALGSEL_3DES (0x21 << OP_ALG_ALGSEL_SHIFT) | |
| 1001 | #define OP_ALG_ALGSEL_ARC4 (0x30 << OP_ALG_ALGSEL_SHIFT) | |
| 1002 | #define OP_ALG_ALGSEL_MD5 (0x40 << OP_ALG_ALGSEL_SHIFT) | |
| 1003 | #define OP_ALG_ALGSEL_SHA1 (0x41 << OP_ALG_ALGSEL_SHIFT) | |
| 1004 | #define OP_ALG_ALGSEL_SHA224 (0x42 << OP_ALG_ALGSEL_SHIFT) | |
| 1005 | #define OP_ALG_ALGSEL_SHA256 (0x43 << OP_ALG_ALGSEL_SHIFT) | |
| 1006 | #define OP_ALG_ALGSEL_SHA384 (0x44 << OP_ALG_ALGSEL_SHIFT) | |
| 1007 | #define OP_ALG_ALGSEL_SHA512 (0x45 << OP_ALG_ALGSEL_SHIFT) | |
| 1008 | #define OP_ALG_ALGSEL_RNG (0x50 << OP_ALG_ALGSEL_SHIFT) | |
| 1009 | #define OP_ALG_ALGSEL_SNOW_F8 (0x60 << OP_ALG_ALGSEL_SHIFT) | |
| 1010 | #define OP_ALG_ALGSEL_KASUMI (0x70 << OP_ALG_ALGSEL_SHIFT) | |
| 1011 | #define OP_ALG_ALGSEL_CRC (0x90 << OP_ALG_ALGSEL_SHIFT) | |
| 1012 | #define OP_ALG_ALGSEL_SNOW_F9 (0xA0 << OP_ALG_ALGSEL_SHIFT) | |
| 1013 | #define OP_ALG_ALGSEL_ZUCE (0xB0 << OP_ALG_ALGSEL_SHIFT) | |
| 1014 | #define OP_ALG_ALGSEL_ZUCA (0xC0 << OP_ALG_ALGSEL_SHIFT) | |
| 1015 | ||
| 1016 | #define OP_ALG_AAI_SHIFT 4 | |
| 1017 | #define OP_ALG_AAI_MASK (0x3ff << OP_ALG_AAI_SHIFT) | |
| 1018 | ||
| 1019 | /* block cipher AAI set */ | |
| 1020 | #define OP_ALG_AESA_MODE_MASK (0xF0 << OP_ALG_AAI_SHIFT) | |
| 1021 | #define OP_ALG_AAI_CTR (0x00 << OP_ALG_AAI_SHIFT) | |
| 1022 | #define OP_ALG_AAI_CTR_MOD128 (0x00 << OP_ALG_AAI_SHIFT) | |
| 1023 | #define OP_ALG_AAI_CTR_MOD8 (0x01 << OP_ALG_AAI_SHIFT) | |
| 1024 | #define OP_ALG_AAI_CTR_MOD16 (0x02 << OP_ALG_AAI_SHIFT) | |
| 1025 | #define OP_ALG_AAI_CTR_MOD24 (0x03 << OP_ALG_AAI_SHIFT) | |
| 1026 | #define OP_ALG_AAI_CTR_MOD32 (0x04 << OP_ALG_AAI_SHIFT) | |
| 1027 | #define OP_ALG_AAI_CTR_MOD40 (0x05 << OP_ALG_AAI_SHIFT) | |
| 1028 | #define OP_ALG_AAI_CTR_MOD48 (0x06 << OP_ALG_AAI_SHIFT) | |
| 1029 | #define OP_ALG_AAI_CTR_MOD56 (0x07 << OP_ALG_AAI_SHIFT) | |
| 1030 | #define OP_ALG_AAI_CTR_MOD64 (0x08 << OP_ALG_AAI_SHIFT) | |
| 1031 | #define OP_ALG_AAI_CTR_MOD72 (0x09 << OP_ALG_AAI_SHIFT) | |
| 1032 | #define OP_ALG_AAI_CTR_MOD80 (0x0a << OP_ALG_AAI_SHIFT) | |
| 1033 | #define OP_ALG_AAI_CTR_MOD88 (0x0b << OP_ALG_AAI_SHIFT) | |
| 1034 | #define OP_ALG_AAI_CTR_MOD96 (0x0c << OP_ALG_AAI_SHIFT) | |
| 1035 | #define OP_ALG_AAI_CTR_MOD104 (0x0d << OP_ALG_AAI_SHIFT) | |
| 1036 | #define OP_ALG_AAI_CTR_MOD112 (0x0e << OP_ALG_AAI_SHIFT) | |
| 1037 | #define OP_ALG_AAI_CTR_MOD120 (0x0f << OP_ALG_AAI_SHIFT) | |
| 1038 | #define OP_ALG_AAI_CBC (0x10 << OP_ALG_AAI_SHIFT) | |
| 1039 | #define OP_ALG_AAI_ECB (0x20 << OP_ALG_AAI_SHIFT) | |
| 1040 | #define OP_ALG_AAI_CFB (0x30 << OP_ALG_AAI_SHIFT) | |
| 1041 | #define OP_ALG_AAI_OFB (0x40 << OP_ALG_AAI_SHIFT) | |
| 1042 | #define OP_ALG_AAI_XTS (0x50 << OP_ALG_AAI_SHIFT) | |
| 1043 | #define OP_ALG_AAI_CMAC (0x60 << OP_ALG_AAI_SHIFT) | |
| 1044 | #define OP_ALG_AAI_XCBC_MAC (0x70 << OP_ALG_AAI_SHIFT) | |
| 1045 | #define OP_ALG_AAI_CCM (0x80 << OP_ALG_AAI_SHIFT) | |
| 1046 | #define OP_ALG_AAI_GCM (0x90 << OP_ALG_AAI_SHIFT) | |
| 1047 | #define OP_ALG_AAI_CBC_XCBCMAC (0xa0 << OP_ALG_AAI_SHIFT) | |
| 1048 | #define OP_ALG_AAI_CTR_XCBCMAC (0xb0 << OP_ALG_AAI_SHIFT) | |
| 1049 | #define OP_ALG_AAI_CBC_CMAC (0xc0 << OP_ALG_AAI_SHIFT) | |
| 1050 | #define OP_ALG_AAI_CTR_CMAC_LTE (0xd0 << OP_ALG_AAI_SHIFT) | |
| 1051 | #define OP_ALG_AAI_CTR_CMAC (0xe0 << OP_ALG_AAI_SHIFT) | |
| 1052 | #define OP_ALG_AAI_CHECKODD (0x80 << OP_ALG_AAI_SHIFT) | |
| 1053 | #define OP_ALG_AAI_DK (0x100 << OP_ALG_AAI_SHIFT) | |
| 1054 | #define OP_ALG_AAI_C2K (0x200 << OP_ALG_AAI_SHIFT) | |
| 1055 | ||
| 1056 | /* randomizer AAI set */ | |
| 1057 | #define OP_ALG_RNG_MODE_MASK (0x30 << OP_ALG_AAI_SHIFT) | |
| 1058 | #define OP_ALG_AAI_RNG (0x00 << OP_ALG_AAI_SHIFT) | |
| 1059 | #define OP_ALG_AAI_RNG_NZB (0x10 << OP_ALG_AAI_SHIFT) | |
| 1060 | #define OP_ALG_AAI_RNG_OBP (0x20 << OP_ALG_AAI_SHIFT) | |
| 1061 | ||
| 1062 | /* RNG4 AAI set */ | |
| 1063 | #define OP_ALG_AAI_RNG4_SH_SHIFT OP_ALG_AAI_SHIFT | |
| 1064 | #define OP_ALG_AAI_RNG4_SH_MASK (0x03 << OP_ALG_AAI_RNG4_SH_SHIFT) | |
| 1065 | #define OP_ALG_AAI_RNG4_SH_0 (0x00 << OP_ALG_AAI_RNG4_SH_SHIFT) | |
| 1066 | #define OP_ALG_AAI_RNG4_SH_1 (0x01 << OP_ALG_AAI_RNG4_SH_SHIFT) | |
| 1067 | #define OP_ALG_AAI_RNG4_PS (0x40 << OP_ALG_AAI_SHIFT) | |
| 1068 | #define OP_ALG_AAI_RNG4_AI (0x80 << OP_ALG_AAI_SHIFT) | |
| 1069 | #define OP_ALG_AAI_RNG4_SK (0x100 << OP_ALG_AAI_SHIFT) | |
| 1070 | ||
| 1071 | /* hmac/smac AAI set */ | |
| 1072 | #define OP_ALG_AAI_HASH (0x00 << OP_ALG_AAI_SHIFT) | |
| 1073 | #define OP_ALG_AAI_HMAC (0x01 << OP_ALG_AAI_SHIFT) | |
| 1074 | #define OP_ALG_AAI_SMAC (0x02 << OP_ALG_AAI_SHIFT) | |
| 1075 | #define OP_ALG_AAI_HMAC_PRECOMP (0x04 << OP_ALG_AAI_SHIFT) | |
| 1076 | ||
| 1077 | /* CRC AAI set*/ | |
| 1078 | #define OP_ALG_CRC_POLY_MASK (0x07 << OP_ALG_AAI_SHIFT) | |
| 1079 | #define OP_ALG_AAI_802 (0x01 << OP_ALG_AAI_SHIFT) | |
| 1080 | #define OP_ALG_AAI_3385 (0x02 << OP_ALG_AAI_SHIFT) | |
| 1081 | #define OP_ALG_AAI_CUST_POLY (0x04 << OP_ALG_AAI_SHIFT) | |
| 1082 | #define OP_ALG_AAI_DIS (0x10 << OP_ALG_AAI_SHIFT) | |
| 1083 | #define OP_ALG_AAI_DOS (0x20 << OP_ALG_AAI_SHIFT) | |
| 1084 | #define OP_ALG_AAI_DOC (0x40 << OP_ALG_AAI_SHIFT) | |
| 1085 | #define OP_ALG_AAI_IVZ (0x80 << OP_ALG_AAI_SHIFT) | |
| 1086 | ||
| 1087 | /* Kasumi/SNOW/ZUC AAI set */ | |
| 1088 | #define OP_ALG_AAI_F8 (0xc0 << OP_ALG_AAI_SHIFT) | |
| 1089 | #define OP_ALG_AAI_F9 (0xc8 << OP_ALG_AAI_SHIFT) | |
| 1090 | #define OP_ALG_AAI_GSM (0x10 << OP_ALG_AAI_SHIFT) | |
| 1091 | #define OP_ALG_AAI_EDGE (0x20 << OP_ALG_AAI_SHIFT) | |
| 1092 | ||
| 1093 | #define OP_ALG_AS_SHIFT 2 | |
| 1094 | #define OP_ALG_AS_MASK (0x3 << OP_ALG_AS_SHIFT) | |
| 1095 | #define OP_ALG_AS_UPDATE (0 << OP_ALG_AS_SHIFT) | |
| 1096 | #define OP_ALG_AS_INIT (1 << OP_ALG_AS_SHIFT) | |
| 1097 | #define OP_ALG_AS_FINALIZE (2 << OP_ALG_AS_SHIFT) | |
| 1098 | #define OP_ALG_AS_INITFINAL (3 << OP_ALG_AS_SHIFT) | |
| 1099 | ||
| 1100 | #define OP_ALG_ICV_SHIFT 1 | |
| 1101 | #define OP_ALG_ICV_MASK (1 << OP_ALG_ICV_SHIFT) | |
| 1102 | #define OP_ALG_ICV_OFF 0 | |
| 1103 | #define OP_ALG_ICV_ON BIT(1) | |
| 1104 | ||
| 1105 | #define OP_ALG_DIR_SHIFT 0 | |
| 1106 | #define OP_ALG_DIR_MASK 1 | |
| 1107 | #define OP_ALG_DECRYPT 0 | |
| 1108 | #define OP_ALG_ENCRYPT BIT(0) | |
| 1109 | ||
| 1110 | /* PKHA algorithm type set */ | |
| 1111 | #define OP_ALG_PK 0x00800000 | |
| 1112 | #define OP_ALG_PK_FUN_MASK 0x3f /* clrmem, modmath, or cpymem */ | |
| 1113 | ||
| 1114 | /* PKHA mode clear memory functions */ | |
| 1115 | #define OP_ALG_PKMODE_A_RAM BIT(19) | |
| 1116 | #define OP_ALG_PKMODE_B_RAM BIT(18) | |
| 1117 | #define OP_ALG_PKMODE_E_RAM BIT(17) | |
| 1118 | #define OP_ALG_PKMODE_N_RAM BIT(16) | |
| 1119 | #define OP_ALG_PKMODE_CLEARMEM BIT(0) | |
| 1120 | ||
| 1121 | /* PKHA mode clear memory functions */ | |
| 1122 | #define OP_ALG_PKMODE_CLEARMEM_ALL (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1123 | OP_ALG_PKMODE_A_RAM | \ | |
| 1124 | OP_ALG_PKMODE_B_RAM | \ | |
| 1125 | OP_ALG_PKMODE_N_RAM | \ | |
| 1126 | OP_ALG_PKMODE_E_RAM) | |
| 1127 | #define OP_ALG_PKMODE_CLEARMEM_ABE (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1128 | OP_ALG_PKMODE_A_RAM | \ | |
| 1129 | OP_ALG_PKMODE_B_RAM | \ | |
| 1130 | OP_ALG_PKMODE_E_RAM) | |
| 1131 | #define OP_ALG_PKMODE_CLEARMEM_ABN (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1132 | OP_ALG_PKMODE_A_RAM | \ | |
| 1133 | OP_ALG_PKMODE_B_RAM | \ | |
| 1134 | OP_ALG_PKMODE_N_RAM) | |
| 1135 | #define OP_ALG_PKMODE_CLEARMEM_AB (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1136 | OP_ALG_PKMODE_A_RAM | \ | |
| 1137 | OP_ALG_PKMODE_B_RAM) | |
| 1138 | #define OP_ALG_PKMODE_CLEARMEM_AEN (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1139 | OP_ALG_PKMODE_A_RAM | \ | |
| 1140 | OP_ALG_PKMODE_E_RAM | \ | |
| 1141 | OP_ALG_PKMODE_N_RAM) | |
| 1142 | #define OP_ALG_PKMODE_CLEARMEM_AE (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1143 | OP_ALG_PKMODE_A_RAM | \ | |
| 1144 | OP_ALG_PKMODE_E_RAM) | |
| 1145 | #define OP_ALG_PKMODE_CLEARMEM_AN (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1146 | OP_ALG_PKMODE_A_RAM | \ | |
| 1147 | OP_ALG_PKMODE_N_RAM) | |
| 1148 | #define OP_ALG_PKMODE_CLEARMEM_A (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1149 | OP_ALG_PKMODE_A_RAM) | |
| 1150 | #define OP_ALG_PKMODE_CLEARMEM_BEN (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1151 | OP_ALG_PKMODE_B_RAM | \ | |
| 1152 | OP_ALG_PKMODE_E_RAM | \ | |
| 1153 | OP_ALG_PKMODE_N_RAM) | |
| 1154 | #define OP_ALG_PKMODE_CLEARMEM_BE (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1155 | OP_ALG_PKMODE_B_RAM | \ | |
| 1156 | OP_ALG_PKMODE_E_RAM) | |
| 1157 | #define OP_ALG_PKMODE_CLEARMEM_BN (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1158 | OP_ALG_PKMODE_B_RAM | \ | |
| 1159 | OP_ALG_PKMODE_N_RAM) | |
| 1160 | #define OP_ALG_PKMODE_CLEARMEM_B (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1161 | OP_ALG_PKMODE_B_RAM) | |
| 1162 | #define OP_ALG_PKMODE_CLEARMEM_EN (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1163 | OP_ALG_PKMODE_E_RAM | \ | |
| 1164 | OP_ALG_PKMODE_N_RAM) | |
| 1165 | #define OP_ALG_PKMODE_CLEARMEM_E (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1166 | OP_ALG_PKMODE_E_RAM) | |
| 1167 | #define OP_ALG_PKMODE_CLEARMEM_N (OP_ALG_PKMODE_CLEARMEM | \ | |
| 1168 | OP_ALG_PKMODE_N_RAM) | |
| 1169 | ||
| 1170 | /* PKHA mode modular-arithmetic functions */ | |
| 1171 | #define OP_ALG_PKMODE_MOD_IN_MONTY BIT(19) | |
| 1172 | #define OP_ALG_PKMODE_MOD_OUT_MONTY BIT(18) | |
| 1173 | #define OP_ALG_PKMODE_MOD_F2M BIT(17) | |
| 1174 | #define OP_ALG_PKMODE_MOD_R2_IN BIT(16) | |
| 1175 | #define OP_ALG_PKMODE_PRJECTV BIT(11) | |
| 1176 | #define OP_ALG_PKMODE_TIME_EQ BIT(10) | |
| 1177 | ||
| 1178 | #define OP_ALG_PKMODE_OUT_B 0x000 | |
| 1179 | #define OP_ALG_PKMODE_OUT_A 0x100 | |
| 1180 | ||
| 1181 | /* | |
| 1182 | * PKHA mode modular-arithmetic integer functions | |
| 1183 | * Can be ORed with OP_ALG_PKMODE_OUT_A to change destination from B | |
| 1184 | */ | |
| 1185 | #define OP_ALG_PKMODE_MOD_ADD 0x002 | |
| 1186 | #define OP_ALG_PKMODE_MOD_SUB_AB 0x003 | |
| 1187 | #define OP_ALG_PKMODE_MOD_SUB_BA 0x004 | |
| 1188 | #define OP_ALG_PKMODE_MOD_MULT 0x005 | |
| 1189 | #define OP_ALG_PKMODE_MOD_MULT_IM (0x005 | OP_ALG_PKMODE_MOD_IN_MONTY) | |
| 1190 | #define OP_ALG_PKMODE_MOD_MULT_IM_OM (0x005 | OP_ALG_PKMODE_MOD_IN_MONTY \ | |
| 1191 | | OP_ALG_PKMODE_MOD_OUT_MONTY) | |
| 1192 | #define OP_ALG_PKMODE_MOD_EXPO 0x006 | |
| 1193 | #define OP_ALG_PKMODE_MOD_EXPO_TEQ (0x006 | OP_ALG_PKMODE_TIME_EQ) | |
| 1194 | #define OP_ALG_PKMODE_MOD_EXPO_IM (0x006 | OP_ALG_PKMODE_MOD_IN_MONTY) | |
| 1195 | #define OP_ALG_PKMODE_MOD_EXPO_IM_TEQ (0x006 | OP_ALG_PKMODE_MOD_IN_MONTY \ | |
| 1196 | | OP_ALG_PKMODE_TIME_EQ) | |
| 1197 | #define OP_ALG_PKMODE_MOD_REDUCT 0x007 | |
| 1198 | #define OP_ALG_PKMODE_MOD_INV 0x008 | |
| 1199 | #define OP_ALG_PKMODE_MOD_ECC_ADD 0x009 | |
| 1200 | #define OP_ALG_PKMODE_MOD_ECC_DBL 0x00a | |
| 1201 | #define OP_ALG_PKMODE_MOD_ECC_MULT 0x00b | |
| 1202 | #define OP_ALG_PKMODE_MOD_MONT_CNST 0x00c | |
| 1203 | #define OP_ALG_PKMODE_MOD_CRT_CNST 0x00d | |
| 1204 | #define OP_ALG_PKMODE_MOD_GCD 0x00e | |
| 1205 | #define OP_ALG_PKMODE_MOD_PRIMALITY 0x00f | |
| 1206 | #define OP_ALG_PKMODE_MOD_SML_EXP 0x016 | |
| 1207 | ||
| 1208 | /* | |
| 1209 | * PKHA mode modular-arithmetic F2m functions | |
| 1210 | * Can be ORed with OP_ALG_PKMODE_OUT_A to change destination from B | |
| 1211 | */ | |
| 1212 | #define OP_ALG_PKMODE_F2M_ADD (0x002 | OP_ALG_PKMODE_MOD_F2M) | |
| 1213 | #define OP_ALG_PKMODE_F2M_MUL (0x005 | OP_ALG_PKMODE_MOD_F2M) | |
| 1214 | #define OP_ALG_PKMODE_F2M_MUL_IM (0x005 | OP_ALG_PKMODE_MOD_F2M \ | |
| 1215 | | OP_ALG_PKMODE_MOD_IN_MONTY) | |
| 1216 | #define OP_ALG_PKMODE_F2M_MUL_IM_OM (0x005 | OP_ALG_PKMODE_MOD_F2M \ | |
| 1217 | | OP_ALG_PKMODE_MOD_IN_MONTY \ | |
| 1218 | | OP_ALG_PKMODE_MOD_OUT_MONTY) | |
| 1219 | #define OP_ALG_PKMODE_F2M_EXP (0x006 | OP_ALG_PKMODE_MOD_F2M) | |
| 1220 | #define OP_ALG_PKMODE_F2M_EXP_TEQ (0x006 | OP_ALG_PKMODE_MOD_F2M \ | |
| 1221 | | OP_ALG_PKMODE_TIME_EQ) | |
| 1222 | #define OP_ALG_PKMODE_F2M_AMODN (0x007 | OP_ALG_PKMODE_MOD_F2M) | |
| 1223 | #define OP_ALG_PKMODE_F2M_INV (0x008 | OP_ALG_PKMODE_MOD_F2M) | |
| 1224 | #define OP_ALG_PKMODE_F2M_R2 (0x00c | OP_ALG_PKMODE_MOD_F2M) | |
| 1225 | #define OP_ALG_PKMODE_F2M_GCD (0x00e | OP_ALG_PKMODE_MOD_F2M) | |
| 1226 | #define OP_ALG_PKMODE_F2M_SML_EXP (0x016 | OP_ALG_PKMODE_MOD_F2M) | |
| 1227 | ||
| 1228 | /* | |
| 1229 | * PKHA mode ECC Integer arithmetic functions | |
| 1230 | * Can be ORed with OP_ALG_PKMODE_OUT_A to change destination from B | |
| 1231 | */ | |
| 1232 | #define OP_ALG_PKMODE_ECC_MOD_ADD 0x009 | |
| 1233 | #define OP_ALG_PKMODE_ECC_MOD_ADD_IM_OM_PROJ \ | |
| 1234 | (0x009 | OP_ALG_PKMODE_MOD_IN_MONTY \ | |
| 1235 | | OP_ALG_PKMODE_MOD_OUT_MONTY \ | |
| 1236 | | OP_ALG_PKMODE_PRJECTV) | |
| 1237 | #define OP_ALG_PKMODE_ECC_MOD_DBL 0x00a | |
| 1238 | #define OP_ALG_PKMODE_ECC_MOD_DBL_IM_OM_PROJ \ | |
| 1239 | (0x00a | OP_ALG_PKMODE_MOD_IN_MONTY \ | |
| 1240 | | OP_ALG_PKMODE_MOD_OUT_MONTY \ | |
| 1241 | | OP_ALG_PKMODE_PRJECTV) | |
| 1242 | #define OP_ALG_PKMODE_ECC_MOD_MUL 0x00b | |
| 1243 | #define OP_ALG_PKMODE_ECC_MOD_MUL_TEQ (0x00b | OP_ALG_PKMODE_TIME_EQ) | |
| 1244 | #define OP_ALG_PKMODE_ECC_MOD_MUL_R2 (0x00b | OP_ALG_PKMODE_MOD_R2_IN) | |
| 1245 | #define OP_ALG_PKMODE_ECC_MOD_MUL_R2_TEQ \ | |
| 1246 | (0x00b | OP_ALG_PKMODE_MOD_R2_IN \ | |
| 1247 | | OP_ALG_PKMODE_TIME_EQ) | |
| 1248 | #define OP_ALG_PKMODE_ECC_MOD_MUL_R2_PROJ \ | |
| 1249 | (0x00b | OP_ALG_PKMODE_MOD_R2_IN \ | |
| 1250 | | OP_ALG_PKMODE_PRJECTV) | |
| 1251 | #define OP_ALG_PKMODE_ECC_MOD_MUL_R2_PROJ_TEQ \ | |
| 1252 | (0x00b | OP_ALG_PKMODE_MOD_R2_IN \ | |
| 1253 | | OP_ALG_PKMODE_PRJECTV \ | |
| 1254 | | OP_ALG_PKMODE_TIME_EQ) | |
| 1255 | ||
| 1256 | /* | |
| 1257 | * PKHA mode ECC F2m arithmetic functions | |
| 1258 | * Can be ORed with OP_ALG_PKMODE_OUT_A to change destination from B | |
| 1259 | */ | |
| 1260 | #define OP_ALG_PKMODE_ECC_F2M_ADD (0x009 | OP_ALG_PKMODE_MOD_F2M) | |
| 1261 | #define OP_ALG_PKMODE_ECC_F2M_ADD_IM_OM_PROJ \ | |
| 1262 | (0x009 | OP_ALG_PKMODE_MOD_F2M \ | |
| 1263 | | OP_ALG_PKMODE_MOD_IN_MONTY \ | |
| 1264 | | OP_ALG_PKMODE_MOD_OUT_MONTY \ | |
| 1265 | | OP_ALG_PKMODE_PRJECTV) | |
| 1266 | #define OP_ALG_PKMODE_ECC_F2M_DBL (0x00a | OP_ALG_PKMODE_MOD_F2M) | |
| 1267 | #define OP_ALG_PKMODE_ECC_F2M_DBL_IM_OM_PROJ \ | |
| 1268 | (0x00a | OP_ALG_PKMODE_MOD_F2M \ | |
| 1269 | | OP_ALG_PKMODE_MOD_IN_MONTY \ | |
| 1270 | | OP_ALG_PKMODE_MOD_OUT_MONTY \ | |
| 1271 | | OP_ALG_PKMODE_PRJECTV) | |
| 1272 | #define OP_ALG_PKMODE_ECC_F2M_MUL (0x00b | OP_ALG_PKMODE_MOD_F2M) | |
| 1273 | #define OP_ALG_PKMODE_ECC_F2M_MUL_TEQ \ | |
| 1274 | (0x00b | OP_ALG_PKMODE_MOD_F2M \ | |
| 1275 | | OP_ALG_PKMODE_TIME_EQ) | |
| 1276 | #define OP_ALG_PKMODE_ECC_F2M_MUL_R2 \ | |
| 1277 | (0x00b | OP_ALG_PKMODE_MOD_F2M \ | |
| 1278 | | OP_ALG_PKMODE_MOD_R2_IN) | |
| 1279 | #define OP_ALG_PKMODE_ECC_F2M_MUL_R2_TEQ \ | |
| 1280 | (0x00b | OP_ALG_PKMODE_MOD_F2M \ | |
| 1281 | | OP_ALG_PKMODE_MOD_R2_IN \ | |
| 1282 | | OP_ALG_PKMODE_TIME_EQ) | |
| 1283 | #define OP_ALG_PKMODE_ECC_F2M_MUL_R2_PROJ \ | |
| 1284 | (0x00b | OP_ALG_PKMODE_MOD_F2M \ | |
| 1285 | | OP_ALG_PKMODE_MOD_R2_IN \ | |
| 1286 | | OP_ALG_PKMODE_PRJECTV) | |
| 1287 | #define OP_ALG_PKMODE_ECC_F2M_MUL_R2_PROJ_TEQ \ | |
| 1288 | (0x00b | OP_ALG_PKMODE_MOD_F2M \ | |
| 1289 | | OP_ALG_PKMODE_MOD_R2_IN \ | |
| 1290 | | OP_ALG_PKMODE_PRJECTV \ | |
| 1291 | | OP_ALG_PKMODE_TIME_EQ) | |
| 1292 | ||
| 1293 | /* PKHA mode copy-memory functions */ | |
| 1294 | #define OP_ALG_PKMODE_SRC_REG_SHIFT 17 | |
| 1295 | #define OP_ALG_PKMODE_SRC_REG_MASK (7 << OP_ALG_PKMODE_SRC_REG_SHIFT) | |
| 1296 | #define OP_ALG_PKMODE_DST_REG_SHIFT 10 | |
| 1297 | #define OP_ALG_PKMODE_DST_REG_MASK (7 << OP_ALG_PKMODE_DST_REG_SHIFT) | |
| 1298 | #define OP_ALG_PKMODE_SRC_SEG_SHIFT 8 | |
| 1299 | #define OP_ALG_PKMODE_SRC_SEG_MASK (3 << OP_ALG_PKMODE_SRC_SEG_SHIFT) | |
| 1300 | #define OP_ALG_PKMODE_DST_SEG_SHIFT 6 | |
| 1301 | #define OP_ALG_PKMODE_DST_SEG_MASK (3 << OP_ALG_PKMODE_DST_SEG_SHIFT) | |
| 1302 | ||
| 1303 | #define OP_ALG_PKMODE_SRC_REG_A (0 << OP_ALG_PKMODE_SRC_REG_SHIFT) | |
| 1304 | #define OP_ALG_PKMODE_SRC_REG_B (1 << OP_ALG_PKMODE_SRC_REG_SHIFT) | |
| 1305 | #define OP_ALG_PKMODE_SRC_REG_N (3 << OP_ALG_PKMODE_SRC_REG_SHIFT) | |
| 1306 | #define OP_ALG_PKMODE_DST_REG_A (0 << OP_ALG_PKMODE_DST_REG_SHIFT) | |
| 1307 | #define OP_ALG_PKMODE_DST_REG_B (1 << OP_ALG_PKMODE_DST_REG_SHIFT) | |
| 1308 | #define OP_ALG_PKMODE_DST_REG_E (2 << OP_ALG_PKMODE_DST_REG_SHIFT) | |
| 1309 | #define OP_ALG_PKMODE_DST_REG_N (3 << OP_ALG_PKMODE_DST_REG_SHIFT) | |
| 1310 | #define OP_ALG_PKMODE_SRC_SEG_0 (0 << OP_ALG_PKMODE_SRC_SEG_SHIFT) | |
| 1311 | #define OP_ALG_PKMODE_SRC_SEG_1 (1 << OP_ALG_PKMODE_SRC_SEG_SHIFT) | |
| 1312 | #define OP_ALG_PKMODE_SRC_SEG_2 (2 << OP_ALG_PKMODE_SRC_SEG_SHIFT) | |
| 1313 | #define OP_ALG_PKMODE_SRC_SEG_3 (3 << OP_ALG_PKMODE_SRC_SEG_SHIFT) | |
| 1314 | #define OP_ALG_PKMODE_DST_SEG_0 (0 << OP_ALG_PKMODE_DST_SEG_SHIFT) | |
| 1315 | #define OP_ALG_PKMODE_DST_SEG_1 (1 << OP_ALG_PKMODE_DST_SEG_SHIFT) | |
| 1316 | #define OP_ALG_PKMODE_DST_SEG_2 (2 << OP_ALG_PKMODE_DST_SEG_SHIFT) | |
| 1317 | #define OP_ALG_PKMODE_DST_SEG_3 (3 << OP_ALG_PKMODE_DST_SEG_SHIFT) | |
| 1318 | ||
| 1319 | /* PKHA mode copy-memory functions - amount based on N SIZE */ | |
| 1320 | #define OP_ALG_PKMODE_COPY_NSZ 0x10 | |
| 1321 | #define OP_ALG_PKMODE_COPY_NSZ_A0_B0 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1322 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1323 | OP_ALG_PKMODE_DST_REG_B) | |
| 1324 | #define OP_ALG_PKMODE_COPY_NSZ_A0_B1 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1325 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1326 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1327 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1328 | #define OP_ALG_PKMODE_COPY_NSZ_A0_B2 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1329 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1330 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1331 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1332 | #define OP_ALG_PKMODE_COPY_NSZ_A0_B3 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1333 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1334 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1335 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1336 | ||
| 1337 | #define OP_ALG_PKMODE_COPY_NSZ_A1_B0 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1338 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1339 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1340 | OP_ALG_PKMODE_DST_REG_B) | |
| 1341 | #define OP_ALG_PKMODE_COPY_NSZ_A1_B1 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1342 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1343 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1344 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1345 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1346 | #define OP_ALG_PKMODE_COPY_NSZ_A1_B2 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1347 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1348 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1349 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1350 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1351 | #define OP_ALG_PKMODE_COPY_NSZ_A1_B3 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1352 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1353 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1354 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1355 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1356 | ||
| 1357 | #define OP_ALG_PKMODE_COPY_NSZ_A2_B0 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1358 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1359 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1360 | OP_ALG_PKMODE_DST_REG_B) | |
| 1361 | #define OP_ALG_PKMODE_COPY_NSZ_A2_B1 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1362 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1363 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1364 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1365 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1366 | #define OP_ALG_PKMODE_COPY_NSZ_A2_B2 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1367 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1368 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1369 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1370 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1371 | #define OP_ALG_PKMODE_COPY_NSZ_A2_B3 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1372 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1373 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1374 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1375 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1376 | ||
| 1377 | #define OP_ALG_PKMODE_COPY_NSZ_A3_B0 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1378 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1379 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1380 | OP_ALG_PKMODE_DST_REG_B) | |
| 1381 | #define OP_ALG_PKMODE_COPY_NSZ_A3_B1 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1382 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1383 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1384 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1385 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1386 | #define OP_ALG_PKMODE_COPY_NSZ_A3_B2 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1387 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1388 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1389 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1390 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1391 | #define OP_ALG_PKMODE_COPY_NSZ_A3_B3 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1392 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1393 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1394 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1395 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1396 | ||
| 1397 | #define OP_ALG_PKMODE_COPY_NSZ_B0_A0 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1398 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1399 | OP_ALG_PKMODE_DST_REG_A) | |
| 1400 | #define OP_ALG_PKMODE_COPY_NSZ_B0_A1 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1401 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1402 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1403 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1404 | #define OP_ALG_PKMODE_COPY_NSZ_B0_A2 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1405 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1406 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1407 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1408 | #define OP_ALG_PKMODE_COPY_NSZ_B0_A3 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1409 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1410 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1411 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1412 | ||
| 1413 | #define OP_ALG_PKMODE_COPY_NSZ_B1_A0 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1414 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1415 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1416 | OP_ALG_PKMODE_DST_REG_A) | |
| 1417 | #define OP_ALG_PKMODE_COPY_NSZ_B1_A1 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1418 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1419 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1420 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1421 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1422 | #define OP_ALG_PKMODE_COPY_NSZ_B1_A2 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1423 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1424 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1425 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1426 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1427 | #define OP_ALG_PKMODE_COPY_NSZ_B1_A3 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1428 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1429 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1430 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1431 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1432 | ||
| 1433 | #define OP_ALG_PKMODE_COPY_NSZ_B2_A0 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1434 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1435 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1436 | OP_ALG_PKMODE_DST_REG_A) | |
| 1437 | #define OP_ALG_PKMODE_COPY_NSZ_B2_A1 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1438 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1439 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1440 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1441 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1442 | #define OP_ALG_PKMODE_COPY_NSZ_B2_A2 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1443 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1444 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1445 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1446 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1447 | #define OP_ALG_PKMODE_COPY_NSZ_B2_A3 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1448 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1449 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1450 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1451 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1452 | ||
| 1453 | #define OP_ALG_PKMODE_COPY_NSZ_B3_A0 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1454 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1455 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1456 | OP_ALG_PKMODE_DST_REG_A) | |
| 1457 | #define OP_ALG_PKMODE_COPY_NSZ_B3_A1 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1458 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1459 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1460 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1461 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1462 | #define OP_ALG_PKMODE_COPY_NSZ_B3_A2 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1463 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1464 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1465 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1466 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1467 | #define OP_ALG_PKMODE_COPY_NSZ_B3_A3 (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1468 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1469 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1470 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1471 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1472 | ||
| 1473 | #define OP_ALG_PKMODE_COPY_NSZ_A_B (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1474 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1475 | OP_ALG_PKMODE_DST_REG_B) | |
| 1476 | #define OP_ALG_PKMODE_COPY_NSZ_A_E (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1477 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1478 | OP_ALG_PKMODE_DST_REG_E) | |
| 1479 | #define OP_ALG_PKMODE_COPY_NSZ_A_N (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1480 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1481 | OP_ALG_PKMODE_DST_REG_N) | |
| 1482 | #define OP_ALG_PKMODE_COPY_NSZ_B_A (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1483 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1484 | OP_ALG_PKMODE_DST_REG_A) | |
| 1485 | #define OP_ALG_PKMODE_COPY_NSZ_B_E (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1486 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1487 | OP_ALG_PKMODE_DST_REG_E) | |
| 1488 | #define OP_ALG_PKMODE_COPY_NSZ_B_N (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1489 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1490 | OP_ALG_PKMODE_DST_REG_N) | |
| 1491 | #define OP_ALG_PKMODE_COPY_NSZ_N_A (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1492 | OP_ALG_PKMODE_SRC_REG_N | \ | |
| 1493 | OP_ALG_PKMODE_DST_REG_A) | |
| 1494 | #define OP_ALG_PKMODE_COPY_NSZ_N_B (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1495 | OP_ALG_PKMODE_SRC_REG_N | \ | |
| 1496 | OP_ALG_PKMODE_DST_REG_B) | |
| 1497 | #define OP_ALG_PKMODE_COPY_NSZ_N_E (OP_ALG_PKMODE_COPY_NSZ | \ | |
| 1498 | OP_ALG_PKMODE_SRC_REG_N | \ | |
| 1499 | OP_ALG_PKMODE_DST_REG_E) | |
| 1500 | ||
| 1501 | /* PKHA mode copy-memory functions - amount based on SRC SIZE */ | |
| 1502 | #define OP_ALG_PKMODE_COPY_SSZ 0x11 | |
| 1503 | #define OP_ALG_PKMODE_COPY_SSZ_A0_B0 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1504 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1505 | OP_ALG_PKMODE_DST_REG_B) | |
| 1506 | #define OP_ALG_PKMODE_COPY_SSZ_A0_B1 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1507 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1508 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1509 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1510 | #define OP_ALG_PKMODE_COPY_SSZ_A0_B2 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1511 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1512 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1513 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1514 | #define OP_ALG_PKMODE_COPY_SSZ_A0_B3 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1515 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1516 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1517 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1518 | ||
| 1519 | #define OP_ALG_PKMODE_COPY_SSZ_A1_B0 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1520 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1521 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1522 | OP_ALG_PKMODE_DST_REG_B) | |
| 1523 | #define OP_ALG_PKMODE_COPY_SSZ_A1_B1 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1524 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1525 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1526 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1527 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1528 | #define OP_ALG_PKMODE_COPY_SSZ_A1_B2 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1529 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1530 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1531 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1532 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1533 | #define OP_ALG_PKMODE_COPY_SSZ_A1_B3 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1534 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1535 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1536 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1537 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1538 | ||
| 1539 | #define OP_ALG_PKMODE_COPY_SSZ_A2_B0 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1540 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1541 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1542 | OP_ALG_PKMODE_DST_REG_B) | |
| 1543 | #define OP_ALG_PKMODE_COPY_SSZ_A2_B1 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1544 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1545 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1546 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1547 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1548 | #define OP_ALG_PKMODE_COPY_SSZ_A2_B2 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1549 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1550 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1551 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1552 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1553 | #define OP_ALG_PKMODE_COPY_SSZ_A2_B3 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1554 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1555 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1556 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1557 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1558 | ||
| 1559 | #define OP_ALG_PKMODE_COPY_SSZ_A3_B0 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1560 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1561 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1562 | OP_ALG_PKMODE_DST_REG_B) | |
| 1563 | #define OP_ALG_PKMODE_COPY_SSZ_A3_B1 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1564 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1565 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1566 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1567 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1568 | #define OP_ALG_PKMODE_COPY_SSZ_A3_B2 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1569 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1570 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1571 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1572 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1573 | #define OP_ALG_PKMODE_COPY_SSZ_A3_B3 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1574 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1575 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1576 | OP_ALG_PKMODE_DST_REG_B | \ | |
| 1577 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1578 | ||
| 1579 | #define OP_ALG_PKMODE_COPY_SSZ_B0_A0 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1580 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1581 | OP_ALG_PKMODE_DST_REG_A) | |
| 1582 | #define OP_ALG_PKMODE_COPY_SSZ_B0_A1 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1583 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1584 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1585 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1586 | #define OP_ALG_PKMODE_COPY_SSZ_B0_A2 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1587 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1588 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1589 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1590 | #define OP_ALG_PKMODE_COPY_SSZ_B0_A3 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1591 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1592 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1593 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1594 | ||
| 1595 | #define OP_ALG_PKMODE_COPY_SSZ_B1_A0 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1596 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1597 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1598 | OP_ALG_PKMODE_DST_REG_A) | |
| 1599 | #define OP_ALG_PKMODE_COPY_SSZ_B1_A1 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1600 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1601 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1602 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1603 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1604 | #define OP_ALG_PKMODE_COPY_SSZ_B1_A2 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1605 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1606 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1607 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1608 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1609 | #define OP_ALG_PKMODE_COPY_SSZ_B1_A3 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1610 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1611 | OP_ALG_PKMODE_SRC_SEG_1 | \ | |
| 1612 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1613 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1614 | ||
| 1615 | #define OP_ALG_PKMODE_COPY_SSZ_B2_A0 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1616 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1617 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1618 | OP_ALG_PKMODE_DST_REG_A) | |
| 1619 | #define OP_ALG_PKMODE_COPY_SSZ_B2_A1 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1620 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1621 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1622 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1623 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1624 | #define OP_ALG_PKMODE_COPY_SSZ_B2_A2 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1625 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1626 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1627 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1628 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1629 | #define OP_ALG_PKMODE_COPY_SSZ_B2_A3 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1630 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1631 | OP_ALG_PKMODE_SRC_SEG_2 | \ | |
| 1632 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1633 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1634 | ||
| 1635 | #define OP_ALG_PKMODE_COPY_SSZ_B3_A0 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1636 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1637 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1638 | OP_ALG_PKMODE_DST_REG_A) | |
| 1639 | #define OP_ALG_PKMODE_COPY_SSZ_B3_A1 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1640 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1641 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1642 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1643 | OP_ALG_PKMODE_DST_SEG_1) | |
| 1644 | #define OP_ALG_PKMODE_COPY_SSZ_B3_A2 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1645 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1646 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1647 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1648 | OP_ALG_PKMODE_DST_SEG_2) | |
| 1649 | #define OP_ALG_PKMODE_COPY_SSZ_B3_A3 (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1650 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1651 | OP_ALG_PKMODE_SRC_SEG_3 | \ | |
| 1652 | OP_ALG_PKMODE_DST_REG_A | \ | |
| 1653 | OP_ALG_PKMODE_DST_SEG_3) | |
| 1654 | ||
| 1655 | #define OP_ALG_PKMODE_COPY_SSZ_A_B (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1656 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1657 | OP_ALG_PKMODE_DST_REG_B) | |
| 1658 | #define OP_ALG_PKMODE_COPY_SSZ_A_E (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1659 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1660 | OP_ALG_PKMODE_DST_REG_E) | |
| 1661 | #define OP_ALG_PKMODE_COPY_SSZ_A_N (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1662 | OP_ALG_PKMODE_SRC_REG_A | \ | |
| 1663 | OP_ALG_PKMODE_DST_REG_N) | |
| 1664 | #define OP_ALG_PKMODE_COPY_SSZ_B_A (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1665 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1666 | OP_ALG_PKMODE_DST_REG_A) | |
| 1667 | #define OP_ALG_PKMODE_COPY_SSZ_B_E (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1668 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1669 | OP_ALG_PKMODE_DST_REG_E) | |
| 1670 | #define OP_ALG_PKMODE_COPY_SSZ_B_N (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1671 | OP_ALG_PKMODE_SRC_REG_B | \ | |
| 1672 | OP_ALG_PKMODE_DST_REG_N) | |
| 1673 | #define OP_ALG_PKMODE_COPY_SSZ_N_A (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1674 | OP_ALG_PKMODE_SRC_REG_N | \ | |
| 1675 | OP_ALG_PKMODE_DST_REG_A) | |
| 1676 | #define OP_ALG_PKMODE_COPY_SSZ_N_B (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1677 | OP_ALG_PKMODE_SRC_REG_N | \ | |
| 1678 | OP_ALG_PKMODE_DST_REG_B) | |
| 1679 | #define OP_ALG_PKMODE_COPY_SSZ_N_E (OP_ALG_PKMODE_COPY_SSZ | \ | |
| 1680 | OP_ALG_PKMODE_SRC_REG_N | \ | |
| 1681 | OP_ALG_PKMODE_DST_REG_E) | |
| 1682 | ||
| 1683 | /* | |
| 1684 | * SEQ_IN_PTR Command Constructs | |
| 1685 | */ | |
| 1686 | ||
| 1687 | /* Release Buffers */ | |
| 1688 | #define SQIN_RBS BIT(26) | |
| 1689 | ||
| 1690 | /* Sequence pointer is really a descriptor */ | |
| 1691 | #define SQIN_INL BIT(25) | |
| 1692 | ||
| 1693 | /* Sequence pointer is a scatter-gather table */ | |
| 1694 | #define SQIN_SGF BIT(24) | |
| 1695 | ||
| 1696 | /* Appends to a previous pointer */ | |
| 1697 | #define SQIN_PRE BIT(23) | |
| 1698 | ||
| 1699 | /* Use extended length following pointer */ | |
| 1700 | #define SQIN_EXT BIT(22) | |
| 1701 | ||
| 1702 | /* Restore sequence with pointer/length */ | |
| 1703 | #define SQIN_RTO BIT(21) | |
| 1704 | ||
| 1705 | /* Replace job descriptor */ | |
| 1706 | #define SQIN_RJD BIT(20) | |
| 1707 | ||
| 1708 | /* Sequence Out Pointer - start a new input sequence using output sequence */ | |
| 1709 | #define SQIN_SOP BIT(19) | |
| 1710 | ||
| 1711 | #define SQIN_LEN_SHIFT 0 | |
| 1712 | #define SQIN_LEN_MASK (0xffff << SQIN_LEN_SHIFT) | |
| 1713 | ||
| 1714 | /* | |
| 1715 | * SEQ_OUT_PTR Command Constructs | |
| 1716 | */ | |
| 1717 | ||
| 1718 | /* Sequence pointer is a scatter-gather table */ | |
| 1719 | #define SQOUT_SGF BIT(24) | |
| 1720 | ||
| 1721 | /* Appends to a previous pointer */ | |
| 1722 | #define SQOUT_PRE BIT(23) | |
| 1723 | ||
| 1724 | /* Restore sequence with pointer/length */ | |
| 1725 | #define SQOUT_RTO BIT(21) | |
| 1726 | ||
| 1727 | /* | |
| 1728 | * Ignore length field, add current output frame length back to SOL register. | |
| 1729 | * Reset tracking length of bytes written to output frame. | |
| 1730 | * Must be used together with SQOUT_RTO. | |
| 1731 | */ | |
| 1732 | #define SQOUT_RST BIT(20) | |
| 1733 | ||
| 1734 | /* Allow "write safe" transactions for this Output Sequence */ | |
| 1735 | #define SQOUT_EWS BIT(19) | |
| 1736 | ||
| 1737 | /* Use extended length following pointer */ | |
| 1738 | #define SQOUT_EXT BIT(22) | |
| 1739 | ||
| 1740 | #define SQOUT_LEN_SHIFT 0 | |
| 1741 | #define SQOUT_LEN_MASK (0xffff << SQOUT_LEN_SHIFT) | |
| 1742 | ||
| 1743 | /* | |
| 1744 | * SIGNATURE Command Constructs | |
| 1745 | */ | |
| 1746 | ||
| 1747 | /* TYPE field is all that's relevant */ | |
| 1748 | #define SIGN_TYPE_SHIFT 16 | |
| 1749 | #define SIGN_TYPE_MASK (0x0f << SIGN_TYPE_SHIFT) | |
| 1750 | ||
| 1751 | #define SIGN_TYPE_FINAL (0x00 << SIGN_TYPE_SHIFT) | |
| 1752 | #define SIGN_TYPE_FINAL_RESTORE (0x01 << SIGN_TYPE_SHIFT) | |
| 1753 | #define SIGN_TYPE_FINAL_NONZERO (0x02 << SIGN_TYPE_SHIFT) | |
| 1754 | #define SIGN_TYPE_IMM_2 (0x0a << SIGN_TYPE_SHIFT) | |
| 1755 | #define SIGN_TYPE_IMM_3 (0x0b << SIGN_TYPE_SHIFT) | |
| 1756 | #define SIGN_TYPE_IMM_4 (0x0c << SIGN_TYPE_SHIFT) | |
| 1757 | ||
| 1758 | /* | |
| 1759 | * MOVE Command Constructs | |
| 1760 | */ | |
| 1761 | ||
| 1762 | #define MOVE_AUX_SHIFT 25 | |
| 1763 | #define MOVE_AUX_MASK (3 << MOVE_AUX_SHIFT) | |
| 1764 | #define MOVE_AUX_MS (2 << MOVE_AUX_SHIFT) | |
| 1765 | #define MOVE_AUX_LS (1 << MOVE_AUX_SHIFT) | |
| 1766 | ||
| 1767 | #define MOVE_WAITCOMP_SHIFT 24 | |
| 1768 | #define MOVE_WAITCOMP_MASK (1 << MOVE_WAITCOMP_SHIFT) | |
| 1769 | #define MOVE_WAITCOMP BIT(24) | |
| 1770 | ||
| 1771 | #define MOVE_SRC_SHIFT 20 | |
| 1772 | #define MOVE_SRC_MASK (0x0f << MOVE_SRC_SHIFT) | |
| 1773 | #define MOVE_SRC_CLASS1CTX (0x00 << MOVE_SRC_SHIFT) | |
| 1774 | #define MOVE_SRC_CLASS2CTX (0x01 << MOVE_SRC_SHIFT) | |
| 1775 | #define MOVE_SRC_OUTFIFO (0x02 << MOVE_SRC_SHIFT) | |
| 1776 | #define MOVE_SRC_DESCBUF (0x03 << MOVE_SRC_SHIFT) | |
| 1777 | #define MOVE_SRC_MATH0 (0x04 << MOVE_SRC_SHIFT) | |
| 1778 | #define MOVE_SRC_MATH1 (0x05 << MOVE_SRC_SHIFT) | |
| 1779 | #define MOVE_SRC_MATH2 (0x06 << MOVE_SRC_SHIFT) | |
| 1780 | #define MOVE_SRC_MATH3 (0x07 << MOVE_SRC_SHIFT) | |
| 1781 | #define MOVE_SRC_INFIFO (0x08 << MOVE_SRC_SHIFT) | |
| 1782 | #define MOVE_SRC_INFIFO_CL (0x09 << MOVE_SRC_SHIFT) | |
| 1783 | #define MOVE_SRC_INFIFO_NO_NFIFO (0x0a << MOVE_SRC_SHIFT) | |
| 1784 | ||
| 1785 | #define MOVE_DEST_SHIFT 16 | |
| 1786 | #define MOVE_DEST_MASK (0x0f << MOVE_DEST_SHIFT) | |
| 1787 | #define MOVE_DEST_CLASS1CTX (0x00 << MOVE_DEST_SHIFT) | |
| 1788 | #define MOVE_DEST_CLASS2CTX (0x01 << MOVE_DEST_SHIFT) | |
| 1789 | #define MOVE_DEST_OUTFIFO (0x02 << MOVE_DEST_SHIFT) | |
| 1790 | #define MOVE_DEST_DESCBUF (0x03 << MOVE_DEST_SHIFT) | |
| 1791 | #define MOVE_DEST_MATH0 (0x04 << MOVE_DEST_SHIFT) | |
| 1792 | #define MOVE_DEST_MATH1 (0x05 << MOVE_DEST_SHIFT) | |
| 1793 | #define MOVE_DEST_MATH2 (0x06 << MOVE_DEST_SHIFT) | |
| 1794 | #define MOVE_DEST_MATH3 (0x07 << MOVE_DEST_SHIFT) | |
| 1795 | #define MOVE_DEST_CLASS1INFIFO (0x08 << MOVE_DEST_SHIFT) | |
| 1796 | #define MOVE_DEST_CLASS2INFIFO (0x09 << MOVE_DEST_SHIFT) | |
| 1797 | #define MOVE_DEST_INFIFO (0x0a << MOVE_DEST_SHIFT) | |
| 1798 | #define MOVE_DEST_PK_A (0x0c << MOVE_DEST_SHIFT) | |
| 1799 | #define MOVE_DEST_CLASS1KEY (0x0d << MOVE_DEST_SHIFT) | |
| 1800 | #define MOVE_DEST_CLASS2KEY (0x0e << MOVE_DEST_SHIFT) | |
| 1801 | #define MOVE_DEST_ALTSOURCE (0x0f << MOVE_DEST_SHIFT) | |
| 1802 | ||
| 1803 | #define MOVE_OFFSET_SHIFT 8 | |
| 1804 | #define MOVE_OFFSET_MASK (0xff << MOVE_OFFSET_SHIFT) | |
| 1805 | ||
| 1806 | #define MOVE_LEN_SHIFT 0 | |
| 1807 | #define MOVE_LEN_MASK (0xff << MOVE_LEN_SHIFT) | |
| 1808 | ||
| 1809 | #define MOVELEN_MRSEL_SHIFT 0 | |
| 1810 | #define MOVELEN_MRSEL_MASK (0x3 << MOVE_LEN_SHIFT) | |
| 1811 | #define MOVELEN_MRSEL_MATH0 (0 << MOVELEN_MRSEL_SHIFT) | |
| 1812 | #define MOVELEN_MRSEL_MATH1 (1 << MOVELEN_MRSEL_SHIFT) | |
| 1813 | #define MOVELEN_MRSEL_MATH2 (2 << MOVELEN_MRSEL_SHIFT) | |
| 1814 | #define MOVELEN_MRSEL_MATH3 (3 << MOVELEN_MRSEL_SHIFT) | |
| 1815 | ||
| 1816 | #define MOVELEN_SIZE_SHIFT 6 | |
| 1817 | #define MOVELEN_SIZE_MASK (0x3 << MOVELEN_SIZE_SHIFT) | |
| 1818 | #define MOVELEN_SIZE_WORD (0x01 << MOVELEN_SIZE_SHIFT) | |
| 1819 | #define MOVELEN_SIZE_BYTE (0x02 << MOVELEN_SIZE_SHIFT) | |
| 1820 | #define MOVELEN_SIZE_DWORD (0x03 << MOVELEN_SIZE_SHIFT) | |
| 1821 | ||
| 1822 | /* | |
| 1823 | * MATH Command Constructs | |
| 1824 | */ | |
| 1825 | ||
| 1826 | #define MATH_IFB_SHIFT 26 | |
| 1827 | #define MATH_IFB_MASK (1 << MATH_IFB_SHIFT) | |
| 1828 | #define MATH_IFB BIT(26) | |
| 1829 | ||
| 1830 | #define MATH_NFU_SHIFT 25 | |
| 1831 | #define MATH_NFU_MASK (1 << MATH_NFU_SHIFT) | |
| 1832 | #define MATH_NFU BIT(25) | |
| 1833 | ||
| 1834 | /* STL for MATH, SSEL for MATHI */ | |
| 1835 | #define MATH_STL_SHIFT 24 | |
| 1836 | #define MATH_STL_MASK (1 << MATH_STL_SHIFT) | |
| 1837 | #define MATH_STL BIT(24) | |
| 1838 | ||
| 1839 | #define MATH_SSEL_SHIFT 24 | |
| 1840 | #define MATH_SSEL_MASK (1 << MATH_SSEL_SHIFT) | |
| 1841 | #define MATH_SSEL BIT(24) | |
| 1842 | ||
| 1843 | #define MATH_SWP_SHIFT 0 | |
| 1844 | #define MATH_SWP_MASK (1 << MATH_SWP_SHIFT) | |
| 1845 | #define MATH_SWP BIT(0) | |
| 1846 | ||
| 1847 | /* Function selectors */ | |
| 1848 | #define MATH_FUN_SHIFT 20 | |
| 1849 | #define MATH_FUN_MASK (0x0f << MATH_FUN_SHIFT) | |
| 1850 | #define MATH_FUN_ADD (0x00 << MATH_FUN_SHIFT) | |
| 1851 | #define MATH_FUN_ADDC (0x01 << MATH_FUN_SHIFT) | |
| 1852 | #define MATH_FUN_SUB (0x02 << MATH_FUN_SHIFT) | |
| 1853 | #define MATH_FUN_SUBB (0x03 << MATH_FUN_SHIFT) | |
| 1854 | #define MATH_FUN_OR (0x04 << MATH_FUN_SHIFT) | |
| 1855 | #define MATH_FUN_AND (0x05 << MATH_FUN_SHIFT) | |
| 1856 | #define MATH_FUN_XOR (0x06 << MATH_FUN_SHIFT) | |
| 1857 | #define MATH_FUN_LSHIFT (0x07 << MATH_FUN_SHIFT) | |
| 1858 | #define MATH_FUN_RSHIFT (0x08 << MATH_FUN_SHIFT) | |
| 1859 | #define MATH_FUN_SHLD (0x09 << MATH_FUN_SHIFT) | |
| 1860 | #define MATH_FUN_ZBYT (0x0a << MATH_FUN_SHIFT) /* ZBYT is for MATH */ | |
| 1861 | #define MATH_FUN_FBYT (0x0a << MATH_FUN_SHIFT) /* FBYT is for MATHI */ | |
| 1862 | #define MATH_FUN_BSWAP (0x0b << MATH_FUN_SHIFT) | |
| 1863 | ||
| 1864 | /* Source 0 selectors */ | |
| 1865 | #define MATH_SRC0_SHIFT 16 | |
| 1866 | #define MATH_SRC0_MASK (0x0f << MATH_SRC0_SHIFT) | |
| 1867 | #define MATH_SRC0_REG0 (0x00 << MATH_SRC0_SHIFT) | |
| 1868 | #define MATH_SRC0_REG1 (0x01 << MATH_SRC0_SHIFT) | |
| 1869 | #define MATH_SRC0_REG2 (0x02 << MATH_SRC0_SHIFT) | |
| 1870 | #define MATH_SRC0_REG3 (0x03 << MATH_SRC0_SHIFT) | |
| 1871 | #define MATH_SRC0_IMM (0x04 << MATH_SRC0_SHIFT) | |
| 1872 | #define MATH_SRC0_DPOVRD (0x07 << MATH_SRC0_SHIFT) | |
| 1873 | #define MATH_SRC0_SEQINLEN (0x08 << MATH_SRC0_SHIFT) | |
| 1874 | #define MATH_SRC0_SEQOUTLEN (0x09 << MATH_SRC0_SHIFT) | |
| 1875 | #define MATH_SRC0_VARSEQINLEN (0x0a << MATH_SRC0_SHIFT) | |
| 1876 | #define MATH_SRC0_VARSEQOUTLEN (0x0b << MATH_SRC0_SHIFT) | |
| 1877 | #define MATH_SRC0_ZERO (0x0c << MATH_SRC0_SHIFT) | |
| 1878 | #define MATH_SRC0_ONE (0x0f << MATH_SRC0_SHIFT) | |
| 1879 | ||
| 1880 | /* Source 1 selectors */ | |
| 1881 | #define MATH_SRC1_SHIFT 12 | |
| 1882 | #define MATHI_SRC1_SHIFT 16 | |
| 1883 | #define MATH_SRC1_MASK (0x0f << MATH_SRC1_SHIFT) | |
| 1884 | #define MATH_SRC1_REG0 (0x00 << MATH_SRC1_SHIFT) | |
| 1885 | #define MATH_SRC1_REG1 (0x01 << MATH_SRC1_SHIFT) | |
| 1886 | #define MATH_SRC1_REG2 (0x02 << MATH_SRC1_SHIFT) | |
| 1887 | #define MATH_SRC1_REG3 (0x03 << MATH_SRC1_SHIFT) | |
| 1888 | #define MATH_SRC1_IMM (0x04 << MATH_SRC1_SHIFT) | |
| 1889 | #define MATH_SRC1_DPOVRD (0x07 << MATH_SRC1_SHIFT) | |
| 1890 | #define MATH_SRC1_VARSEQINLEN (0x08 << MATH_SRC1_SHIFT) | |
| 1891 | #define MATH_SRC1_VARSEQOUTLEN (0x09 << MATH_SRC1_SHIFT) | |
| 1892 | #define MATH_SRC1_INFIFO (0x0a << MATH_SRC1_SHIFT) | |
| 1893 | #define MATH_SRC1_OUTFIFO (0x0b << MATH_SRC1_SHIFT) | |
| 1894 | #define MATH_SRC1_ONE (0x0c << MATH_SRC1_SHIFT) | |
| 1895 | #define MATH_SRC1_JOBSOURCE (0x0d << MATH_SRC1_SHIFT) | |
| 1896 | #define MATH_SRC1_ZERO (0x0f << MATH_SRC1_SHIFT) | |
| 1897 | ||
| 1898 | /* Destination selectors */ | |
| 1899 | #define MATH_DEST_SHIFT 8 | |
| 1900 | #define MATHI_DEST_SHIFT 12 | |
| 1901 | #define MATH_DEST_MASK (0x0f << MATH_DEST_SHIFT) | |
| 1902 | #define MATH_DEST_REG0 (0x00 << MATH_DEST_SHIFT) | |
| 1903 | #define MATH_DEST_REG1 (0x01 << MATH_DEST_SHIFT) | |
| 1904 | #define MATH_DEST_REG2 (0x02 << MATH_DEST_SHIFT) | |
| 1905 | #define MATH_DEST_REG3 (0x03 << MATH_DEST_SHIFT) | |
| 1906 | #define MATH_DEST_DPOVRD (0x07 << MATH_DEST_SHIFT) | |
| 1907 | #define MATH_DEST_SEQINLEN (0x08 << MATH_DEST_SHIFT) | |
| 1908 | #define MATH_DEST_SEQOUTLEN (0x09 << MATH_DEST_SHIFT) | |
| 1909 | #define MATH_DEST_VARSEQINLEN (0x0a << MATH_DEST_SHIFT) | |
| 1910 | #define MATH_DEST_VARSEQOUTLEN (0x0b << MATH_DEST_SHIFT) | |
| 1911 | #define MATH_DEST_NONE (0x0f << MATH_DEST_SHIFT) | |
| 1912 | ||
| 1913 | /* MATHI Immediate value */ | |
| 1914 | #define MATHI_IMM_SHIFT 4 | |
| 1915 | #define MATHI_IMM_MASK (0xff << MATHI_IMM_SHIFT) | |
| 1916 | ||
| 1917 | /* Length selectors */ | |
| 1918 | #define MATH_LEN_SHIFT 0 | |
| 1919 | #define MATH_LEN_MASK (0x0f << MATH_LEN_SHIFT) | |
| 1920 | #define MATH_LEN_1BYTE 0x01 | |
| 1921 | #define MATH_LEN_2BYTE 0x02 | |
| 1922 | #define MATH_LEN_4BYTE 0x04 | |
| 1923 | #define MATH_LEN_8BYTE 0x08 | |
| 1924 | ||
| 1925 | /* | |
| 1926 | * JUMP Command Constructs | |
| 1927 | */ | |
| 1928 | ||
| 1929 | #define JUMP_CLASS_SHIFT 25 | |
| 1930 | #define JUMP_CLASS_MASK (3 << JUMP_CLASS_SHIFT) | |
| 1931 | #define JUMP_CLASS_NONE 0 | |
| 1932 | #define JUMP_CLASS_CLASS1 (1 << JUMP_CLASS_SHIFT) | |
| 1933 | #define JUMP_CLASS_CLASS2 (2 << JUMP_CLASS_SHIFT) | |
| 1934 | #define JUMP_CLASS_BOTH (3 << JUMP_CLASS_SHIFT) | |
| 1935 | ||
| 1936 | #define JUMP_JSL_SHIFT 24 | |
| 1937 | #define JUMP_JSL_MASK (1 << JUMP_JSL_SHIFT) | |
| 1938 | #define JUMP_JSL BIT(24) | |
| 1939 | ||
| 1940 | #define JUMP_TYPE_SHIFT 20 | |
| 1941 | #define JUMP_TYPE_MASK (0x0f << JUMP_TYPE_SHIFT) | |
| 1942 | #define JUMP_TYPE_LOCAL (0x00 << JUMP_TYPE_SHIFT) | |
| 1943 | #define JUMP_TYPE_LOCAL_INC (0x01 << JUMP_TYPE_SHIFT) | |
| 1944 | #define JUMP_TYPE_GOSUB (0x02 << JUMP_TYPE_SHIFT) | |
| 1945 | #define JUMP_TYPE_LOCAL_DEC (0x03 << JUMP_TYPE_SHIFT) | |
| 1946 | #define JUMP_TYPE_NONLOCAL (0x04 << JUMP_TYPE_SHIFT) | |
| 1947 | #define JUMP_TYPE_RETURN (0x06 << JUMP_TYPE_SHIFT) | |
| 1948 | #define JUMP_TYPE_HALT (0x08 << JUMP_TYPE_SHIFT) | |
| 1949 | #define JUMP_TYPE_HALT_USER (0x0c << JUMP_TYPE_SHIFT) | |
| 1950 | ||
| 1951 | #define JUMP_TEST_SHIFT 16 | |
| 1952 | #define JUMP_TEST_MASK (0x03 << JUMP_TEST_SHIFT) | |
| 1953 | #define JUMP_TEST_ALL (0x00 << JUMP_TEST_SHIFT) | |
| 1954 | #define JUMP_TEST_INVALL (0x01 << JUMP_TEST_SHIFT) | |
| 1955 | #define JUMP_TEST_ANY (0x02 << JUMP_TEST_SHIFT) | |
| 1956 | #define JUMP_TEST_INVANY (0x03 << JUMP_TEST_SHIFT) | |
| 1957 | ||
| 1958 | /* Condition codes. JSL bit is factored in */ | |
| 1959 | #define JUMP_COND_SHIFT 8 | |
| 1960 | #define JUMP_COND_MASK ((0xff << JUMP_COND_SHIFT) | JUMP_JSL) | |
| 1961 | #define JUMP_COND_PK_0 BIT(15) | |
| 1962 | #define JUMP_COND_PK_GCD_1 BIT(14) | |
| 1963 | #define JUMP_COND_PK_PRIME BIT(13) | |
| 1964 | #define JUMP_COND_MATH_N BIT(11) | |
| 1965 | #define JUMP_COND_MATH_Z BIT(10) | |
| 1966 | #define JUMP_COND_MATH_C BIT(9) | |
| 1967 | #define JUMP_COND_MATH_NV BIT(8) | |
| 1968 | ||
| 1969 | #define JUMP_COND_JQP (BIT(15) | JUMP_JSL) | |
| 1970 | #define JUMP_COND_SHRD (BIT(14) | JUMP_JSL) | |
| 1971 | #define JUMP_COND_SELF (BIT(13) | JUMP_JSL) | |
| 1972 | #define JUMP_COND_CALM (BIT(12) | JUMP_JSL) | |
| 1973 | #define JUMP_COND_NIP (BIT(11) | JUMP_JSL) | |
| 1974 | #define JUMP_COND_NIFP (BIT(10) | JUMP_JSL) | |
| 1975 | #define JUMP_COND_NOP (BIT(9) | JUMP_JSL) | |
| 1976 | #define JUMP_COND_NCP (BIT(8) | JUMP_JSL) | |
| 1977 | ||
| 1978 | /* Source / destination selectors */ | |
| 1979 | #define JUMP_SRC_DST_SHIFT 12 | |
| 1980 | #define JUMP_SRC_DST_MASK (0x0f << JUMP_SRC_DST_SHIFT) | |
| 1981 | #define JUMP_SRC_DST_MATH0 (0x00 << JUMP_SRC_DST_SHIFT) | |
| 1982 | #define JUMP_SRC_DST_MATH1 (0x01 << JUMP_SRC_DST_SHIFT) | |
| 1983 | #define JUMP_SRC_DST_MATH2 (0x02 << JUMP_SRC_DST_SHIFT) | |
| 1984 | #define JUMP_SRC_DST_MATH3 (0x03 << JUMP_SRC_DST_SHIFT) | |
| 1985 | #define JUMP_SRC_DST_DPOVRD (0x07 << JUMP_SRC_DST_SHIFT) | |
| 1986 | #define JUMP_SRC_DST_SEQINLEN (0x08 << JUMP_SRC_DST_SHIFT) | |
| 1987 | #define JUMP_SRC_DST_SEQOUTLEN (0x09 << JUMP_SRC_DST_SHIFT) | |
| 1988 | #define JUMP_SRC_DST_VARSEQINLEN (0x0a << JUMP_SRC_DST_SHIFT) | |
| 1989 | #define JUMP_SRC_DST_VARSEQOUTLEN (0x0b << JUMP_SRC_DST_SHIFT) | |
| 1990 | ||
| 1991 | #define JUMP_OFFSET_SHIFT 0 | |
| 1992 | #define JUMP_OFFSET_MASK (0xff << JUMP_OFFSET_SHIFT) | |
| 1993 | ||
| 1994 | /* | |
| 1995 | * NFIFO ENTRY | |
| 1996 | * Data Constructs | |
| 1997 | * | |
| 1998 | */ | |
| 1999 | #define NFIFOENTRY_DEST_SHIFT 30 | |
| 2000 | #define NFIFOENTRY_DEST_MASK ((uint32_t)(3 << NFIFOENTRY_DEST_SHIFT)) | |
| 2001 | #define NFIFOENTRY_DEST_DECO (0 << NFIFOENTRY_DEST_SHIFT) | |
| 2002 | #define NFIFOENTRY_DEST_CLASS1 (1 << NFIFOENTRY_DEST_SHIFT) | |
| 2003 | #define NFIFOENTRY_DEST_CLASS2 ((uint32_t)(2 << NFIFOENTRY_DEST_SHIFT)) | |
| 2004 | #define NFIFOENTRY_DEST_BOTH ((uint32_t)(3 << NFIFOENTRY_DEST_SHIFT)) | |
| 2005 | ||
| 2006 | #define NFIFOENTRY_LC2_SHIFT 29 | |
| 2007 | #define NFIFOENTRY_LC2_MASK (1 << NFIFOENTRY_LC2_SHIFT) | |
| 2008 | #define NFIFOENTRY_LC2 BIT(29) | |
| 2009 | ||
| 2010 | #define NFIFOENTRY_LC1_SHIFT 28 | |
| 2011 | #define NFIFOENTRY_LC1_MASK (1 << NFIFOENTRY_LC1_SHIFT) | |
| 2012 | #define NFIFOENTRY_LC1 BIT(28) | |
| 2013 | ||
| 2014 | #define NFIFOENTRY_FC2_SHIFT 27 | |
| 2015 | #define NFIFOENTRY_FC2_MASK (1 << NFIFOENTRY_FC2_SHIFT) | |
| 2016 | #define NFIFOENTRY_FC2 BIT(27) | |
| 2017 | ||
| 2018 | #define NFIFOENTRY_FC1_SHIFT 26 | |
| 2019 | #define NFIFOENTRY_FC1_MASK (1 << NFIFOENTRY_FC1_SHIFT) | |
| 2020 | #define NFIFOENTRY_FC1 BIT(26) | |
| 2021 | ||
| 2022 | #define NFIFOENTRY_STYPE_SHIFT 24 | |
| 2023 | #define NFIFOENTRY_STYPE_MASK (3 << NFIFOENTRY_STYPE_SHIFT) | |
| 2024 | #define NFIFOENTRY_STYPE_DFIFO (0 << NFIFOENTRY_STYPE_SHIFT) | |
| 2025 | #define NFIFOENTRY_STYPE_OFIFO (1 << NFIFOENTRY_STYPE_SHIFT) | |
| 2026 | #define NFIFOENTRY_STYPE_PAD (2 << NFIFOENTRY_STYPE_SHIFT) | |
| 2027 | #define NFIFOENTRY_STYPE_SNOOP (3 << NFIFOENTRY_STYPE_SHIFT) | |
| 2028 | #define NFIFOENTRY_STYPE_ALTSOURCE ((0 << NFIFOENTRY_STYPE_SHIFT) \ | |
| 2029 | | NFIFOENTRY_AST) | |
| 2030 | #define NFIFOENTRY_STYPE_OFIFO_SYNC ((1 << NFIFOENTRY_STYPE_SHIFT) \ | |
| 2031 | | NFIFOENTRY_AST) | |
| 2032 | #define NFIFOENTRY_STYPE_SNOOP_ALT ((3 << NFIFOENTRY_STYPE_SHIFT) \ | |
| 2033 | | NFIFOENTRY_AST) | |
| 2034 | ||
| 2035 | #define NFIFOENTRY_DTYPE_SHIFT 20 | |
| 2036 | #define NFIFOENTRY_DTYPE_MASK (0xF << NFIFOENTRY_DTYPE_SHIFT) | |
| 2037 | ||
| 2038 | #define NFIFOENTRY_DTYPE_SBOX (0x0 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2039 | #define NFIFOENTRY_DTYPE_AAD (0x1 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2040 | #define NFIFOENTRY_DTYPE_IV (0x2 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2041 | #define NFIFOENTRY_DTYPE_SAD (0x3 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2042 | #define NFIFOENTRY_DTYPE_ICV (0xA << NFIFOENTRY_DTYPE_SHIFT) | |
| 2043 | #define NFIFOENTRY_DTYPE_SKIP (0xE << NFIFOENTRY_DTYPE_SHIFT) | |
| 2044 | #define NFIFOENTRY_DTYPE_MSG (0xF << NFIFOENTRY_DTYPE_SHIFT) | |
| 2045 | ||
| 2046 | #define NFIFOENTRY_DTYPE_PK_A0 (0x0 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2047 | #define NFIFOENTRY_DTYPE_PK_A1 (0x1 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2048 | #define NFIFOENTRY_DTYPE_PK_A2 (0x2 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2049 | #define NFIFOENTRY_DTYPE_PK_A3 (0x3 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2050 | #define NFIFOENTRY_DTYPE_PK_B0 (0x4 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2051 | #define NFIFOENTRY_DTYPE_PK_B1 (0x5 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2052 | #define NFIFOENTRY_DTYPE_PK_B2 (0x6 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2053 | #define NFIFOENTRY_DTYPE_PK_B3 (0x7 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2054 | #define NFIFOENTRY_DTYPE_PK_N (0x8 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2055 | #define NFIFOENTRY_DTYPE_PK_E (0x9 << NFIFOENTRY_DTYPE_SHIFT) | |
| 2056 | #define NFIFOENTRY_DTYPE_PK_A (0xC << NFIFOENTRY_DTYPE_SHIFT) | |
| 2057 | #define NFIFOENTRY_DTYPE_PK_B (0xD << NFIFOENTRY_DTYPE_SHIFT) | |
| 2058 | ||
| 2059 | #define NFIFOENTRY_BND_SHIFT 19 | |
| 2060 | #define NFIFOENTRY_BND_MASK (1 << NFIFOENTRY_BND_SHIFT) | |
| 2061 | #define NFIFOENTRY_BND BIT(19) | |
| 2062 | ||
| 2063 | #define NFIFOENTRY_PTYPE_SHIFT 16 | |
| 2064 | #define NFIFOENTRY_PTYPE_MASK (0x7 << NFIFOENTRY_PTYPE_SHIFT) | |
| 2065 | ||
| 2066 | #define NFIFOENTRY_PTYPE_ZEROS (0x0 << NFIFOENTRY_PTYPE_SHIFT) | |
| 2067 | #define NFIFOENTRY_PTYPE_RND_NOZEROS (0x1 << NFIFOENTRY_PTYPE_SHIFT) | |
| 2068 | #define NFIFOENTRY_PTYPE_INCREMENT (0x2 << NFIFOENTRY_PTYPE_SHIFT) | |
| 2069 | #define NFIFOENTRY_PTYPE_RND (0x3 << NFIFOENTRY_PTYPE_SHIFT) | |
| 2070 | #define NFIFOENTRY_PTYPE_ZEROS_NZ (0x4 << NFIFOENTRY_PTYPE_SHIFT) | |
| 2071 | #define NFIFOENTRY_PTYPE_RND_NZ_LZ (0x5 << NFIFOENTRY_PTYPE_SHIFT) | |
| 2072 | #define NFIFOENTRY_PTYPE_N (0x6 << NFIFOENTRY_PTYPE_SHIFT) | |
| 2073 | #define NFIFOENTRY_PTYPE_RND_NZ_N (0x7 << NFIFOENTRY_PTYPE_SHIFT) | |
| 2074 | ||
| 2075 | #define NFIFOENTRY_OC_SHIFT 15 | |
| 2076 | #define NFIFOENTRY_OC_MASK (1 << NFIFOENTRY_OC_SHIFT) | |
| 2077 | #define NFIFOENTRY_OC BIT(15) | |
| 2078 | ||
| 2079 | #define NFIFOENTRY_PR_SHIFT 15 | |
| 2080 | #define NFIFOENTRY_PR_MASK (1 << NFIFOENTRY_PR_SHIFT) | |
| 2081 | #define NFIFOENTRY_PR BIT(15) | |
| 2082 | ||
| 2083 | #define NFIFOENTRY_AST_SHIFT 14 | |
| 2084 | #define NFIFOENTRY_AST_MASK (1 << NFIFOENTRY_AST_SHIFT) | |
| 2085 | #define NFIFOENTRY_AST BIT(14) | |
| 2086 | ||
| 2087 | #define NFIFOENTRY_BM_SHIFT 11 | |
| 2088 | #define NFIFOENTRY_BM_MASK (1 << NFIFOENTRY_BM_SHIFT) | |
| 2089 | #define NFIFOENTRY_BM BIT(11) | |
| 2090 | ||
| 2091 | #define NFIFOENTRY_PS_SHIFT 10 | |
| 2092 | #define NFIFOENTRY_PS_MASK (1 << NFIFOENTRY_PS_SHIFT) | |
| 2093 | #define NFIFOENTRY_PS BIT(10) | |
| 2094 | ||
| 2095 | #define NFIFOENTRY_DLEN_SHIFT 0 | |
| 2096 | #define NFIFOENTRY_DLEN_MASK (0xFFF << NFIFOENTRY_DLEN_SHIFT) | |
| 2097 | ||
| 2098 | #define NFIFOENTRY_PLEN_SHIFT 0 | |
| 2099 | #define NFIFOENTRY_PLEN_MASK (0xFF << NFIFOENTRY_PLEN_SHIFT) | |
| 2100 | ||
| 2101 | /* Append Load Immediate Command */ | |
| 2102 | #define FD_CMD_APPEND_LOAD_IMMEDIATE BIT(31) | |
| 2103 | ||
| 2104 | /* Set SEQ LIODN equal to the Non-SEQ LIODN for the job */ | |
| 2105 | #define FD_CMD_SET_SEQ_LIODN_EQUAL_NONSEQ_LIODN BIT(30) | |
| 2106 | ||
| 2107 | /* Frame Descriptor Command for Replacement Job Descriptor */ | |
| 2108 | #define FD_CMD_REPLACE_JOB_DESC BIT(29) | |
| 2109 | ||
| 2110 | #endif /* __RTA_DESC_H__ */ |