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1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Chelsio Communications.
3 * All rights reserved.
4 */
5
6 #ifndef T4_MSG_H
7 #define T4_MSG_H
8
9 enum {
10 CPL_ACT_OPEN_REQ = 0x3,
11 CPL_SET_TCB_FIELD = 0x5,
12 CPL_ABORT_REQ = 0xA,
13 CPL_ABORT_RPL = 0xB,
14 CPL_L2T_WRITE_REQ = 0x12,
15 CPL_TID_RELEASE = 0x1A,
16 CPL_L2T_WRITE_RPL = 0x23,
17 CPL_ACT_OPEN_RPL = 0x25,
18 CPL_ABORT_RPL_RSS = 0x2D,
19 CPL_SET_TCB_RPL = 0x3A,
20 CPL_ACT_OPEN_REQ6 = 0x83,
21 CPL_SGE_EGR_UPDATE = 0xA5,
22 CPL_FW4_MSG = 0xC0,
23 CPL_FW6_MSG = 0xE0,
24 CPL_TX_PKT_LSO = 0xED,
25 CPL_TX_PKT_XT = 0xEE,
26 };
27
28 enum CPL_error {
29 CPL_ERR_NONE = 0,
30 CPL_ERR_TCAM_FULL = 3,
31 };
32
33 enum {
34 ULP_MODE_NONE = 0,
35 ULP_MODE_TCPDDP = 5,
36 };
37
38 enum {
39 CPL_ABORT_SEND_RST = 0,
40 CPL_ABORT_NO_RST,
41 };
42
43 enum { /* TX_PKT_XT checksum types */
44 TX_CSUM_TCPIP = 8,
45 TX_CSUM_UDPIP = 9,
46 TX_CSUM_TCPIP6 = 10,
47 };
48
49 union opcode_tid {
50 __be32 opcode_tid;
51 __u8 opcode;
52 };
53
54 #define S_CPL_OPCODE 24
55 #define V_CPL_OPCODE(x) ((x) << S_CPL_OPCODE)
56
57 #define G_TID(x) ((x) & 0xFFFFFF)
58
59 /* tid is assumed to be 24-bits */
60 #define MK_OPCODE_TID(opcode, tid) (V_CPL_OPCODE(opcode) | (tid))
61
62 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid)
63
64 /* extract the TID from a CPL command */
65 #define GET_TID(cmd) (G_TID(be32_to_cpu(OPCODE_TID(cmd))))
66
67 /* partitioning of TID fields that also carry a queue id */
68 #define S_TID_TID 0
69 #define M_TID_TID 0x3fff
70 #define G_TID_TID(x) (((x) >> S_TID_TID) & M_TID_TID)
71
72 #define S_TID_QID 14
73 #define V_TID_QID(x) ((x) << S_TID_QID)
74
75 struct rss_header {
76 __u8 opcode;
77 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
78 __u8 channel:2;
79 __u8 filter_hit:1;
80 __u8 filter_tid:1;
81 __u8 hash_type:2;
82 __u8 ipv6:1;
83 __u8 send2fw:1;
84 #else
85 __u8 send2fw:1;
86 __u8 ipv6:1;
87 __u8 hash_type:2;
88 __u8 filter_tid:1;
89 __u8 filter_hit:1;
90 __u8 channel:2;
91 #endif
92 __be16 qid;
93 __be32 hash_val;
94 };
95
96 #if defined(RSS_HDR_VLD) || defined(CHELSIO_FW)
97 #define RSS_HDR struct rss_header rss_hdr
98 #else
99 #define RSS_HDR
100 #endif
101
102 #ifndef CHELSIO_FW
103 struct work_request_hdr {
104 __be32 wr_hi;
105 __be32 wr_mid;
106 __be64 wr_lo;
107 };
108
109 #define WR_HDR struct work_request_hdr wr
110 #define WR_HDR_SIZE sizeof(struct work_request_hdr)
111 #else
112 #define WR_HDR
113 #define WR_HDR_SIZE 0
114 #endif
115
116 #define S_COOKIE 5
117 #define M_COOKIE 0x7
118 #define V_COOKIE(x) ((x) << S_COOKIE)
119 #define G_COOKIE(x) (((x) >> S_COOKIE) & M_COOKIE)
120
121 /* option 0 fields */
122 #define S_TX_CHAN 2
123 #define V_TX_CHAN(x) ((x) << S_TX_CHAN)
124
125 #define S_DELACK 5
126 #define V_DELACK(x) ((x) << S_DELACK)
127
128 #define S_NON_OFFLOAD 7
129 #define V_NON_OFFLOAD(x) ((x) << S_NON_OFFLOAD)
130 #define F_NON_OFFLOAD V_NON_OFFLOAD(1U)
131
132 #define S_ULP_MODE 8
133 #define V_ULP_MODE(x) ((x) << S_ULP_MODE)
134
135 #define S_SMAC_SEL 28
136 #define V_SMAC_SEL(x) ((__u64)(x) << S_SMAC_SEL)
137
138 #define S_TCAM_BYPASS 48
139 #define V_TCAM_BYPASS(x) ((__u64)(x) << S_TCAM_BYPASS)
140 #define F_TCAM_BYPASS V_TCAM_BYPASS(1ULL)
141
142 #define S_L2T_IDX 36
143 #define V_L2T_IDX(x) ((__u64)(x) << S_L2T_IDX)
144
145 #define S_NAGLE 49
146 #define V_NAGLE(x) ((__u64)(x) << S_NAGLE)
147
148 /* option 2 fields */
149 #define S_RSS_QUEUE 0
150 #define V_RSS_QUEUE(x) ((x) << S_RSS_QUEUE)
151
152 #define S_RSS_QUEUE_VALID 10
153 #define V_RSS_QUEUE_VALID(x) ((x) << S_RSS_QUEUE_VALID)
154 #define F_RSS_QUEUE_VALID V_RSS_QUEUE_VALID(1U)
155
156 #define S_CONG_CNTRL 14
157 #define V_CONG_CNTRL(x) ((x) << S_CONG_CNTRL)
158
159 #define S_RX_CHANNEL 26
160 #define V_RX_CHANNEL(x) ((x) << S_RX_CHANNEL)
161 #define F_RX_CHANNEL V_RX_CHANNEL(1U)
162
163 #define S_CCTRL_ECN 27
164 #define V_CCTRL_ECN(x) ((x) << S_CCTRL_ECN)
165
166 #define S_SACK_EN 30
167 #define V_SACK_EN(x) ((x) << S_SACK_EN)
168
169 #define S_T5_OPT_2_VALID 31
170 #define V_T5_OPT_2_VALID(x) ((x) << S_T5_OPT_2_VALID)
171 #define F_T5_OPT_2_VALID V_T5_OPT_2_VALID(1U)
172
173 struct cpl_t6_act_open_req {
174 WR_HDR;
175 union opcode_tid ot;
176 __be16 local_port;
177 __be16 peer_port;
178 __be32 local_ip;
179 __be32 peer_ip;
180 __be64 opt0;
181 __be32 rsvd;
182 __be32 opt2;
183 __be64 params;
184 __be32 rsvd2;
185 __be32 opt3;
186 };
187
188 struct cpl_t6_act_open_req6 {
189 WR_HDR;
190 union opcode_tid ot;
191 __be16 local_port;
192 __be16 peer_port;
193 __be64 local_ip_hi;
194 __be64 local_ip_lo;
195 __be64 peer_ip_hi;
196 __be64 peer_ip_lo;
197 __be64 opt0;
198 __be32 rsvd;
199 __be32 opt2;
200 __be64 params;
201 __be32 rsvd2;
202 __be32 opt3;
203 };
204
205 #define S_FILTER_TUPLE 24
206 #define V_FILTER_TUPLE(x) ((x) << S_FILTER_TUPLE)
207
208 struct cpl_act_open_rpl {
209 RSS_HDR
210 union opcode_tid ot;
211 __be32 atid_status;
212 };
213
214 /* cpl_act_open_rpl.atid_status fields */
215 #define S_AOPEN_STATUS 0
216 #define M_AOPEN_STATUS 0xFF
217 #define G_AOPEN_STATUS(x) (((x) >> S_AOPEN_STATUS) & M_AOPEN_STATUS)
218
219 #define S_AOPEN_ATID 8
220 #define M_AOPEN_ATID 0xFFFFFF
221 #define G_AOPEN_ATID(x) (((x) >> S_AOPEN_ATID) & M_AOPEN_ATID)
222
223 struct cpl_set_tcb_field {
224 WR_HDR;
225 union opcode_tid ot;
226 __be16 reply_ctrl;
227 __be16 word_cookie;
228 __be64 mask;
229 __be64 val;
230 };
231
232 /* cpl_set_tcb_field.word_cookie fields */
233 #define S_WORD 0
234 #define V_WORD(x) ((x) << S_WORD)
235
236 /* cpl_get_tcb.reply_ctrl fields */
237 #define S_QUEUENO 0
238 #define V_QUEUENO(x) ((x) << S_QUEUENO)
239
240 #define S_REPLY_CHAN 14
241 #define V_REPLY_CHAN(x) ((x) << S_REPLY_CHAN)
242
243 #define S_NO_REPLY 15
244 #define V_NO_REPLY(x) ((x) << S_NO_REPLY)
245
246 struct cpl_set_tcb_rpl {
247 RSS_HDR
248 union opcode_tid ot;
249 __be16 rsvd;
250 __u8 cookie;
251 __u8 status;
252 __be64 oldval;
253 };
254
255 /* cpl_abort_req status command code
256 */
257 struct cpl_abort_req {
258 WR_HDR;
259 union opcode_tid ot;
260 __be32 rsvd0;
261 __u8 rsvd1;
262 __u8 cmd;
263 __u8 rsvd2[6];
264 };
265
266 struct cpl_abort_rpl_rss {
267 RSS_HDR
268 union opcode_tid ot;
269 __u8 rsvd[3];
270 __u8 status;
271 };
272
273 struct cpl_abort_rpl {
274 WR_HDR;
275 union opcode_tid ot;
276 __be32 rsvd0;
277 __u8 rsvd1;
278 __u8 cmd;
279 __u8 rsvd2[6];
280 };
281
282 struct cpl_tid_release {
283 WR_HDR;
284 union opcode_tid ot;
285 __be32 rsvd;
286 };
287
288 struct cpl_tx_data {
289 union opcode_tid ot;
290 __be32 len;
291 __be32 rsvd;
292 __be32 flags;
293 };
294
295 struct cpl_tx_pkt_core {
296 __be32 ctrl0;
297 __be16 pack;
298 __be16 len;
299 __be64 ctrl1;
300 };
301
302 struct cpl_tx_pkt {
303 WR_HDR;
304 struct cpl_tx_pkt_core c;
305 };
306
307 /* cpl_tx_pkt_core.ctrl0 fields */
308 #define S_TXPKT_PF 8
309 #define M_TXPKT_PF 0x7
310 #define V_TXPKT_PF(x) ((x) << S_TXPKT_PF)
311 #define G_TXPKT_PF(x) (((x) >> S_TXPKT_PF) & M_TXPKT_PF)
312
313 #define S_TXPKT_INTF 16
314 #define M_TXPKT_INTF 0xF
315 #define V_TXPKT_INTF(x) ((x) << S_TXPKT_INTF)
316 #define G_TXPKT_INTF(x) (((x) >> S_TXPKT_INTF) & M_TXPKT_INTF)
317
318 #define S_TXPKT_OPCODE 24
319 #define M_TXPKT_OPCODE 0xFF
320 #define V_TXPKT_OPCODE(x) ((x) << S_TXPKT_OPCODE)
321 #define G_TXPKT_OPCODE(x) (((x) >> S_TXPKT_OPCODE) & M_TXPKT_OPCODE)
322
323 /* cpl_tx_pkt_core.ctrl1 fields */
324 #define S_TXPKT_IPHDR_LEN 20
325 #define M_TXPKT_IPHDR_LEN 0x3FFF
326 #define V_TXPKT_IPHDR_LEN(x) ((__u64)(x) << S_TXPKT_IPHDR_LEN)
327 #define G_TXPKT_IPHDR_LEN(x) (((x) >> S_TXPKT_IPHDR_LEN) & M_TXPKT_IPHDR_LEN)
328
329 #define S_TXPKT_ETHHDR_LEN 34
330 #define M_TXPKT_ETHHDR_LEN 0x3F
331 #define V_TXPKT_ETHHDR_LEN(x) ((__u64)(x) << S_TXPKT_ETHHDR_LEN)
332 #define G_TXPKT_ETHHDR_LEN(x) (((x) >> S_TXPKT_ETHHDR_LEN) & M_TXPKT_ETHHDR_LEN)
333
334 #define S_T6_TXPKT_ETHHDR_LEN 32
335 #define M_T6_TXPKT_ETHHDR_LEN 0xFF
336 #define V_T6_TXPKT_ETHHDR_LEN(x) ((__u64)(x) << S_T6_TXPKT_ETHHDR_LEN)
337 #define G_T6_TXPKT_ETHHDR_LEN(x) \
338 (((x) >> S_T6_TXPKT_ETHHDR_LEN) & M_T6_TXPKT_ETHHDR_LEN)
339
340 #define S_TXPKT_CSUM_TYPE 40
341 #define M_TXPKT_CSUM_TYPE 0xF
342 #define V_TXPKT_CSUM_TYPE(x) ((__u64)(x) << S_TXPKT_CSUM_TYPE)
343 #define G_TXPKT_CSUM_TYPE(x) (((x) >> S_TXPKT_CSUM_TYPE) & M_TXPKT_CSUM_TYPE)
344
345 #define S_TXPKT_VLAN 44
346 #define M_TXPKT_VLAN 0xFFFF
347 #define V_TXPKT_VLAN(x) ((__u64)(x) << S_TXPKT_VLAN)
348 #define G_TXPKT_VLAN(x) (((x) >> S_TXPKT_VLAN) & M_TXPKT_VLAN)
349
350 #define S_TXPKT_VLAN_VLD 60
351 #define V_TXPKT_VLAN_VLD(x) ((__u64)(x) << S_TXPKT_VLAN_VLD)
352 #define F_TXPKT_VLAN_VLD V_TXPKT_VLAN_VLD(1ULL)
353
354 #define S_TXPKT_IPCSUM_DIS 62
355 #define V_TXPKT_IPCSUM_DIS(x) ((__u64)(x) << S_TXPKT_IPCSUM_DIS)
356 #define F_TXPKT_IPCSUM_DIS V_TXPKT_IPCSUM_DIS(1ULL)
357
358 #define S_TXPKT_L4CSUM_DIS 63
359 #define V_TXPKT_L4CSUM_DIS(x) ((__u64)(x) << S_TXPKT_L4CSUM_DIS)
360 #define F_TXPKT_L4CSUM_DIS V_TXPKT_L4CSUM_DIS(1ULL)
361
362 struct cpl_tx_pkt_lso_core {
363 __be32 lso_ctrl;
364 __be16 ipid_ofst;
365 __be16 mss;
366 __be32 seqno_offset;
367 __be32 len;
368 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
369 };
370
371 struct cpl_tx_pkt_lso {
372 WR_HDR;
373 struct cpl_tx_pkt_lso_core c;
374 /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
375 };
376
377 /* cpl_tx_pkt_lso_core.lso_ctrl fields */
378 #define S_LSO_TCPHDR_LEN 0
379 #define M_LSO_TCPHDR_LEN 0xF
380 #define V_LSO_TCPHDR_LEN(x) ((x) << S_LSO_TCPHDR_LEN)
381 #define G_LSO_TCPHDR_LEN(x) (((x) >> S_LSO_TCPHDR_LEN) & M_LSO_TCPHDR_LEN)
382
383 #define S_LSO_IPHDR_LEN 4
384 #define M_LSO_IPHDR_LEN 0xFFF
385 #define V_LSO_IPHDR_LEN(x) ((x) << S_LSO_IPHDR_LEN)
386 #define G_LSO_IPHDR_LEN(x) (((x) >> S_LSO_IPHDR_LEN) & M_LSO_IPHDR_LEN)
387
388 #define S_LSO_ETHHDR_LEN 16
389 #define M_LSO_ETHHDR_LEN 0xF
390 #define V_LSO_ETHHDR_LEN(x) ((x) << S_LSO_ETHHDR_LEN)
391 #define G_LSO_ETHHDR_LEN(x) (((x) >> S_LSO_ETHHDR_LEN) & M_LSO_ETHHDR_LEN)
392
393 #define S_LSO_IPV6 20
394 #define V_LSO_IPV6(x) ((x) << S_LSO_IPV6)
395 #define F_LSO_IPV6 V_LSO_IPV6(1U)
396
397 #define S_LSO_LAST_SLICE 22
398 #define V_LSO_LAST_SLICE(x) ((x) << S_LSO_LAST_SLICE)
399 #define F_LSO_LAST_SLICE V_LSO_LAST_SLICE(1U)
400
401 #define S_LSO_FIRST_SLICE 23
402 #define V_LSO_FIRST_SLICE(x) ((x) << S_LSO_FIRST_SLICE)
403 #define F_LSO_FIRST_SLICE V_LSO_FIRST_SLICE(1U)
404
405 #define S_LSO_OPCODE 24
406 #define M_LSO_OPCODE 0xFF
407 #define V_LSO_OPCODE(x) ((x) << S_LSO_OPCODE)
408 #define G_LSO_OPCODE(x) (((x) >> S_LSO_OPCODE) & M_LSO_OPCODE)
409
410 #define S_LSO_T5_XFER_SIZE 0
411 #define M_LSO_T5_XFER_SIZE 0xFFFFFFF
412 #define V_LSO_T5_XFER_SIZE(x) ((x) << S_LSO_T5_XFER_SIZE)
413 #define G_LSO_T5_XFER_SIZE(x) (((x) >> S_LSO_T5_XFER_SIZE) & M_LSO_T5_XFER_SIZE)
414
415 struct cpl_rx_pkt {
416 RSS_HDR;
417 __u8 opcode;
418 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
419 __u8 iff:4;
420 __u8 csum_calc:1;
421 __u8 ipmi_pkt:1;
422 __u8 vlan_ex:1;
423 __u8 ip_frag:1;
424 #else
425 __u8 ip_frag:1;
426 __u8 vlan_ex:1;
427 __u8 ipmi_pkt:1;
428 __u8 csum_calc:1;
429 __u8 iff:4;
430 #endif
431 __be16 csum;
432 __be16 vlan;
433 __be16 len;
434 __be32 l2info;
435 __be16 hdr_len;
436 __be16 err_vec;
437 };
438
439 struct cpl_l2t_write_req {
440 WR_HDR;
441 union opcode_tid ot;
442 __be16 params;
443 __be16 l2t_idx;
444 __be16 vlan;
445 __u8 dst_mac[6];
446 };
447
448 /* cpl_l2t_write_req.params fields */
449 #define S_L2T_W_PORT 8
450 #define V_L2T_W_PORT(x) ((x) << S_L2T_W_PORT)
451
452 #define S_L2T_W_LPBK 10
453 #define V_L2T_W_LPBK(x) ((x) << S_L2T_W_LPBK)
454
455 #define S_L2T_W_ARPMISS 11
456 #define V_L2T_W_ARPMISS(x) ((x) << S_L2T_W_ARPMISS)
457
458 #define S_L2T_W_NOREPLY 15
459 #define V_L2T_W_NOREPLY(x) ((x) << S_L2T_W_NOREPLY)
460
461 struct cpl_l2t_write_rpl {
462 RSS_HDR
463 union opcode_tid ot;
464 __u8 status;
465 __u8 rsvd[3];
466 };
467
468 /* rx_pkt.l2info fields */
469 #define S_RXF_UDP 22
470 #define V_RXF_UDP(x) ((x) << S_RXF_UDP)
471 #define F_RXF_UDP V_RXF_UDP(1U)
472
473 #define S_RXF_TCP 23
474 #define V_RXF_TCP(x) ((x) << S_RXF_TCP)
475 #define F_RXF_TCP V_RXF_TCP(1U)
476
477 #define S_RXF_IP 24
478 #define V_RXF_IP(x) ((x) << S_RXF_IP)
479 #define F_RXF_IP V_RXF_IP(1U)
480
481 #define S_RXF_IP6 25
482 #define V_RXF_IP6(x) ((x) << S_RXF_IP6)
483 #define F_RXF_IP6 V_RXF_IP6(1U)
484
485 /* rx_pkt.err_vec fields */
486 /* In T6, rx_pkt.err_vec indicates
487 * RxError Error vector (16b) or
488 * Encapsulating header length (8b),
489 * Outer encapsulation type (2b) and
490 * compressed error vector (6b) if CRxPktEnc is
491 * enabled in TP_OUT_CONFIG
492 */
493 #define S_T6_COMPR_RXERR_VEC 0
494 #define M_T6_COMPR_RXERR_VEC 0x3F
495 #define V_T6_COMPR_RXERR_VEC(x) ((x) << S_T6_COMPR_RXERR_VEC)
496 #define G_T6_COMPR_RXERR_VEC(x) \
497 (((x) >> S_T6_COMPR_RXERR_VEC) & M_T6_COMPR_RXERR_VEC)
498
499 /* cpl_fw*.type values */
500 enum {
501 FW_TYPE_RSSCPL = 4,
502 };
503
504 struct cpl_fw4_msg {
505 RSS_HDR;
506 u8 opcode;
507 u8 type;
508 __be16 rsvd0;
509 __be32 rsvd1;
510 __be64 data[2];
511 };
512
513 struct cpl_fw6_msg {
514 RSS_HDR;
515 u8 opcode;
516 u8 type;
517 __be16 rsvd0;
518 __be32 rsvd1;
519 __be64 data[4];
520 };
521
522 /* ULP_TX opcodes */
523 enum {
524 ULP_TX_PKT = 4
525 };
526
527 enum {
528 ULP_TX_SC_NOOP = 0x80,
529 ULP_TX_SC_IMM = 0x81,
530 ULP_TX_SC_DSGL = 0x82,
531 ULP_TX_SC_ISGL = 0x83
532 };
533
534 #define S_ULPTX_CMD 24
535 #define M_ULPTX_CMD 0xFF
536 #define V_ULPTX_CMD(x) ((x) << S_ULPTX_CMD)
537
538 #define S_ULP_TX_SC_MORE 23
539 #define V_ULP_TX_SC_MORE(x) ((x) << S_ULP_TX_SC_MORE)
540 #define F_ULP_TX_SC_MORE V_ULP_TX_SC_MORE(1U)
541
542 struct ulptx_sge_pair {
543 __be32 len[2];
544 __be64 addr[2];
545 };
546
547 struct ulptx_sgl {
548 __be32 cmd_nsge;
549 __be32 len0;
550 __be64 addr0;
551
552 #if !(defined C99_NOT_SUPPORTED)
553 struct ulptx_sge_pair sge[0];
554 #endif
555
556 };
557
558 struct ulptx_idata {
559 __be32 cmd_more;
560 __be32 len;
561 };
562
563 #define S_ULPTX_NSGE 0
564 #define M_ULPTX_NSGE 0xFFFF
565 #define V_ULPTX_NSGE(x) ((x) << S_ULPTX_NSGE)
566
567 struct ulp_txpkt {
568 __be32 cmd_dest;
569 __be32 len;
570 };
571
572 /* ulp_txpkt.cmd_dest fields */
573 #define S_ULP_TXPKT_DEST 16
574 #define M_ULP_TXPKT_DEST 0x3
575 #define V_ULP_TXPKT_DEST(x) ((x) << S_ULP_TXPKT_DEST)
576
577 #define S_ULP_TXPKT_FID 4
578 #define M_ULP_TXPKT_FID 0x7ff
579 #define V_ULP_TXPKT_FID(x) ((x) << S_ULP_TXPKT_FID)
580
581 #define S_ULP_TXPKT_RO 3
582 #define V_ULP_TXPKT_RO(x) ((x) << S_ULP_TXPKT_RO)
583 #define F_ULP_TXPKT_RO V_ULP_TXPKT_RO(1U)
584
585 #endif /* T4_MSG_H */