ceph/src/spdk/dpdk/drivers/net/cxgbe/base/t4_msg.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2014-2018 Chelsio Communications.
   3  * All rights reserved.
   4  */
   5
   6 #ifndef T4_MSG_H
   7 #define T4_MSG_H
   8
   9 enum {
  10         CPL_ACT_OPEN_REQ      = 0x3,
  11         CPL_SET_TCB_FIELD     = 0x5,
  12         CPL_ABORT_REQ         = 0xA,
  13         CPL_ABORT_RPL         = 0xB,
  14         CPL_L2T_WRITE_REQ     = 0x12,
  15         CPL_SMT_WRITE_REQ     = 0x14,
  16         CPL_TID_RELEASE       = 0x1A,
  17         CPL_L2T_WRITE_RPL     = 0x23,
  18         CPL_ACT_OPEN_RPL      = 0x25,
  19         CPL_ABORT_RPL_RSS     = 0x2D,
  20         CPL_SMT_WRITE_RPL     = 0x2E,
  21         CPL_SET_TCB_RPL       = 0x3A,
  22         CPL_ACT_OPEN_REQ6     = 0x83,
  23         CPL_SGE_EGR_UPDATE    = 0xA5,
  24         CPL_FW4_MSG           = 0xC0,
  25         CPL_FW6_MSG           = 0xE0,
  26         CPL_TX_PKT_LSO        = 0xED,
  27         CPL_TX_PKT_XT         = 0xEE,
  28 };
  29
  30 enum CPL_error {
  31         CPL_ERR_NONE               = 0,
  32         CPL_ERR_TCAM_FULL          = 3,
  33 };
  34
  35 enum {
  36         ULP_MODE_NONE          = 0,
  37         ULP_MODE_TCPDDP        = 5,
  38 };
  39
  40 enum {
  41         CPL_ABORT_SEND_RST = 0,
  42         CPL_ABORT_NO_RST,
  43 };
  44
  45 enum {                     /* TX_PKT_XT checksum types */
  46         TX_CSUM_TCPIP  = 8,
  47         TX_CSUM_UDPIP  = 9,
  48         TX_CSUM_TCPIP6 = 10,
  49 };
  50
  51 union opcode_tid {
  52         __be32 opcode_tid;
  53         __u8 opcode;
  54 };
  55
  56 #define S_CPL_OPCODE    24
  57 #define V_CPL_OPCODE(x) ((x) << S_CPL_OPCODE)
  58
  59 #define G_TID(x)    ((x) & 0xFFFFFF)
  60
  61 /* tid is assumed to be 24-bits */
  62 #define MK_OPCODE_TID(opcode, tid) (V_CPL_OPCODE(opcode) | (tid))
  63
  64 #define OPCODE_TID(cmd) ((cmd)->ot.opcode_tid)
  65
  66 /* extract the TID from a CPL command */
  67 #define GET_TID(cmd) (G_TID(be32_to_cpu(OPCODE_TID(cmd))))
  68
  69 /* partitioning of TID fields that also carry a queue id */
  70 #define S_TID_TID    0
  71 #define M_TID_TID    0x3fff
  72 #define G_TID_TID(x) (((x) >> S_TID_TID) & M_TID_TID)
  73
  74 #define S_TID_QID    14
  75 #define V_TID_QID(x) ((x) << S_TID_QID)
  76
  77 struct rss_header {
  78         __u8 opcode;
  79 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
  80         __u8 channel:2;
  81         __u8 filter_hit:1;
  82         __u8 filter_tid:1;
  83         __u8 hash_type:2;
  84         __u8 ipv6:1;
  85         __u8 send2fw:1;
  86 #else
  87         __u8 send2fw:1;
  88         __u8 ipv6:1;
  89         __u8 hash_type:2;
  90         __u8 filter_tid:1;
  91         __u8 filter_hit:1;
  92         __u8 channel:2;
  93 #endif
  94         __be16 qid;
  95         __be32 hash_val;
  96 };
  97
  98 #if defined(RSS_HDR_VLD) || defined(CHELSIO_FW)
  99 #define RSS_HDR struct rss_header rss_hdr
 100 #else
 101 #define RSS_HDR
 102 #endif
 103
 104 #ifndef CHELSIO_FW
 105 struct work_request_hdr {
 106         __be32 wr_hi;
 107         __be32 wr_mid;
 108         __be64 wr_lo;
 109 };
 110
 111 #define WR_HDR struct work_request_hdr wr
 112 #define WR_HDR_SIZE sizeof(struct work_request_hdr)
 113 #else
 114 #define WR_HDR
 115 #define WR_HDR_SIZE 0
 116 #endif
 117
 118 #define S_COOKIE    5
 119 #define M_COOKIE    0x7
 120 #define V_COOKIE(x) ((x) << S_COOKIE)
 121 #define G_COOKIE(x) (((x) >> S_COOKIE) & M_COOKIE)
 122
 123 /* option 0 fields */
 124 #define S_TX_CHAN    2
 125 #define V_TX_CHAN(x) ((x) << S_TX_CHAN)
 126
 127 #define S_DELACK    5
 128 #define V_DELACK(x) ((x) << S_DELACK)
 129
 130 #define S_NON_OFFLOAD    7
 131 #define V_NON_OFFLOAD(x) ((x) << S_NON_OFFLOAD)
 132 #define F_NON_OFFLOAD    V_NON_OFFLOAD(1U)
 133
 134 #define S_ULP_MODE    8
 135 #define V_ULP_MODE(x) ((x) << S_ULP_MODE)
 136
 137 #define S_SMAC_SEL    28
 138 #define V_SMAC_SEL(x) ((__u64)(x) << S_SMAC_SEL)
 139
 140 #define S_TCAM_BYPASS    48
 141 #define V_TCAM_BYPASS(x) ((__u64)(x) << S_TCAM_BYPASS)
 142 #define F_TCAM_BYPASS    V_TCAM_BYPASS(1ULL)
 143
 144 #define S_L2T_IDX    36
 145 #define V_L2T_IDX(x) ((__u64)(x) << S_L2T_IDX)
 146
 147 #define S_NAGLE    49
 148 #define V_NAGLE(x) ((__u64)(x) << S_NAGLE)
 149
 150 /* option 2 fields */
 151 #define S_RSS_QUEUE    0
 152 #define V_RSS_QUEUE(x) ((x) << S_RSS_QUEUE)
 153
 154 #define S_RSS_QUEUE_VALID    10
 155 #define V_RSS_QUEUE_VALID(x) ((x) << S_RSS_QUEUE_VALID)
 156 #define F_RSS_QUEUE_VALID    V_RSS_QUEUE_VALID(1U)
 157
 158 #define S_CONG_CNTRL    14
 159 #define V_CONG_CNTRL(x) ((x) << S_CONG_CNTRL)
 160
 161 #define S_RX_CHANNEL    26
 162 #define V_RX_CHANNEL(x) ((x) << S_RX_CHANNEL)
 163 #define F_RX_CHANNEL    V_RX_CHANNEL(1U)
 164
 165 #define S_CCTRL_ECN    27
 166 #define V_CCTRL_ECN(x) ((x) << S_CCTRL_ECN)
 167
 168 #define S_SACK_EN    30
 169 #define V_SACK_EN(x) ((x) << S_SACK_EN)
 170
 171 #define S_T5_OPT_2_VALID    31
 172 #define V_T5_OPT_2_VALID(x) ((x) << S_T5_OPT_2_VALID)
 173 #define F_T5_OPT_2_VALID    V_T5_OPT_2_VALID(1U)
 174
 175 struct cpl_t6_act_open_req {
 176         WR_HDR;
 177         union opcode_tid ot;
 178         __be16 local_port;
 179         __be16 peer_port;
 180         __be32 local_ip;
 181         __be32 peer_ip;
 182         __be64 opt0;
 183         __be32 rsvd;
 184         __be32 opt2;
 185         __be64 params;
 186         __be32 rsvd2;
 187         __be32 opt3;
 188 };
 189
 190 struct cpl_t6_act_open_req6 {
 191         WR_HDR;
 192         union opcode_tid ot;
 193         __be16 local_port;
 194         __be16 peer_port;
 195         __be64 local_ip_hi;
 196         __be64 local_ip_lo;
 197         __be64 peer_ip_hi;
 198         __be64 peer_ip_lo;
 199         __be64 opt0;
 200         __be32 rsvd;
 201         __be32 opt2;
 202         __be64 params;
 203         __be32 rsvd2;
 204         __be32 opt3;
 205 };
 206
 207 #define S_FILTER_TUPLE  24
 208 #define V_FILTER_TUPLE(x) ((x) << S_FILTER_TUPLE)
 209
 210 struct cpl_act_open_rpl {
 211         RSS_HDR
 212         union opcode_tid ot;
 213         __be32 atid_status;
 214 };
 215
 216 /* cpl_act_open_rpl.atid_status fields */
 217 #define S_AOPEN_STATUS    0
 218 #define M_AOPEN_STATUS    0xFF
 219 #define G_AOPEN_STATUS(x) (((x) >> S_AOPEN_STATUS) & M_AOPEN_STATUS)
 220
 221 #define S_AOPEN_ATID    8
 222 #define M_AOPEN_ATID    0xFFFFFF
 223 #define G_AOPEN_ATID(x) (((x) >> S_AOPEN_ATID) & M_AOPEN_ATID)
 224
 225 struct cpl_set_tcb_field {
 226         WR_HDR;
 227         union opcode_tid ot;
 228         __be16 reply_ctrl;
 229         __be16 word_cookie;
 230         __be64 mask;
 231         __be64 val;
 232 };
 233
 234 /* cpl_set_tcb_field.word_cookie fields */
 235 #define S_WORD    0
 236 #define V_WORD(x) ((x) << S_WORD)
 237
 238 /* cpl_get_tcb.reply_ctrl fields */
 239 #define S_QUEUENO    0
 240 #define V_QUEUENO(x) ((x) << S_QUEUENO)
 241
 242 #define S_REPLY_CHAN    14
 243 #define V_REPLY_CHAN(x) ((x) << S_REPLY_CHAN)
 244
 245 #define S_NO_REPLY    15
 246 #define V_NO_REPLY(x) ((x) << S_NO_REPLY)
 247
 248 struct cpl_set_tcb_rpl {
 249         RSS_HDR
 250         union opcode_tid ot;
 251         __be16 rsvd;
 252         __u8   cookie;
 253         __u8   status;
 254         __be64 oldval;
 255 };
 256
 257 /* cpl_abort_req status command code
 258  */
 259 struct cpl_abort_req {
 260         WR_HDR;
 261         union opcode_tid ot;
 262         __be32 rsvd0;
 263         __u8  rsvd1;
 264         __u8  cmd;
 265         __u8  rsvd2[6];
 266 };
 267
 268 struct cpl_abort_rpl_rss {
 269         RSS_HDR
 270         union opcode_tid ot;
 271         __u8  rsvd[3];
 272         __u8  status;
 273 };
 274
 275 struct cpl_abort_rpl {
 276         WR_HDR;
 277         union opcode_tid ot;
 278         __be32 rsvd0;
 279         __u8  rsvd1;
 280         __u8  cmd;
 281         __u8  rsvd2[6];
 282 };
 283
 284 struct cpl_tid_release {
 285         WR_HDR;
 286         union opcode_tid ot;
 287         __be32 rsvd;
 288 };
 289
 290 struct cpl_tx_data {
 291         union opcode_tid ot;
 292         __be32 len;
 293         __be32 rsvd;
 294         __be32 flags;
 295 };
 296
 297 struct cpl_tx_pkt_core {
 298         __be32 ctrl0;
 299         __be16 pack;
 300         __be16 len;
 301         __be64 ctrl1;
 302 };
 303
 304 struct cpl_tx_pkt {
 305         WR_HDR;
 306         struct cpl_tx_pkt_core c;
 307 };
 308
 309 /* cpl_tx_pkt_core.ctrl0 fields */
 310 #define S_TXPKT_PF    8
 311 #define M_TXPKT_PF    0x7
 312 #define V_TXPKT_PF(x) ((x) << S_TXPKT_PF)
 313 #define G_TXPKT_PF(x) (((x) >> S_TXPKT_PF) & M_TXPKT_PF)
 314
 315 #define S_TXPKT_INTF    16
 316 #define M_TXPKT_INTF    0xF
 317 #define V_TXPKT_INTF(x) ((x) << S_TXPKT_INTF)
 318 #define G_TXPKT_INTF(x) (((x) >> S_TXPKT_INTF) & M_TXPKT_INTF)
 319
 320 #define S_TXPKT_OPCODE    24
 321 #define M_TXPKT_OPCODE    0xFF
 322 #define V_TXPKT_OPCODE(x) ((x) << S_TXPKT_OPCODE)
 323 #define G_TXPKT_OPCODE(x) (((x) >> S_TXPKT_OPCODE) & M_TXPKT_OPCODE)
 324
 325 /* cpl_tx_pkt_core.ctrl1 fields */
 326 #define S_TXPKT_IPHDR_LEN    20
 327 #define M_TXPKT_IPHDR_LEN    0x3FFF
 328 #define V_TXPKT_IPHDR_LEN(x) ((__u64)(x) << S_TXPKT_IPHDR_LEN)
 329 #define G_TXPKT_IPHDR_LEN(x) (((x) >> S_TXPKT_IPHDR_LEN) & M_TXPKT_IPHDR_LEN)
 330
 331 #define S_TXPKT_ETHHDR_LEN    34
 332 #define M_TXPKT_ETHHDR_LEN    0x3F
 333 #define V_TXPKT_ETHHDR_LEN(x) ((__u64)(x) << S_TXPKT_ETHHDR_LEN)
 334 #define G_TXPKT_ETHHDR_LEN(x) (((x) >> S_TXPKT_ETHHDR_LEN) & M_TXPKT_ETHHDR_LEN)
 335
 336 #define S_T6_TXPKT_ETHHDR_LEN    32
 337 #define M_T6_TXPKT_ETHHDR_LEN    0xFF
 338 #define V_T6_TXPKT_ETHHDR_LEN(x) ((__u64)(x) << S_T6_TXPKT_ETHHDR_LEN)
 339 #define G_T6_TXPKT_ETHHDR_LEN(x) \
 340         (((x) >> S_T6_TXPKT_ETHHDR_LEN) & M_T6_TXPKT_ETHHDR_LEN)
 341
 342 #define S_TXPKT_CSUM_TYPE    40
 343 #define M_TXPKT_CSUM_TYPE    0xF
 344 #define V_TXPKT_CSUM_TYPE(x) ((__u64)(x) << S_TXPKT_CSUM_TYPE)
 345 #define G_TXPKT_CSUM_TYPE(x) (((x) >> S_TXPKT_CSUM_TYPE) & M_TXPKT_CSUM_TYPE)
 346
 347 #define S_TXPKT_VLAN    44
 348 #define M_TXPKT_VLAN    0xFFFF
 349 #define V_TXPKT_VLAN(x) ((__u64)(x) << S_TXPKT_VLAN)
 350 #define G_TXPKT_VLAN(x) (((x) >> S_TXPKT_VLAN) & M_TXPKT_VLAN)
 351
 352 #define S_TXPKT_VLAN_VLD    60
 353 #define V_TXPKT_VLAN_VLD(x) ((__u64)(x) << S_TXPKT_VLAN_VLD)
 354 #define F_TXPKT_VLAN_VLD    V_TXPKT_VLAN_VLD(1ULL)
 355
 356 #define S_TXPKT_IPCSUM_DIS    62
 357 #define V_TXPKT_IPCSUM_DIS(x) ((__u64)(x) << S_TXPKT_IPCSUM_DIS)
 358 #define F_TXPKT_IPCSUM_DIS    V_TXPKT_IPCSUM_DIS(1ULL)
 359
 360 #define S_TXPKT_L4CSUM_DIS    63
 361 #define V_TXPKT_L4CSUM_DIS(x) ((__u64)(x) << S_TXPKT_L4CSUM_DIS)
 362 #define F_TXPKT_L4CSUM_DIS    V_TXPKT_L4CSUM_DIS(1ULL)
 363
 364 struct cpl_tx_pkt_lso_core {
 365         __be32 lso_ctrl;
 366         __be16 ipid_ofst;
 367         __be16 mss;
 368         __be32 seqno_offset;
 369         __be32 len;
 370         /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
 371 };
 372
 373 struct cpl_tx_pkt_lso {
 374         WR_HDR;
 375         struct cpl_tx_pkt_lso_core c;
 376         /* encapsulated CPL (TX_PKT, TX_PKT_XT or TX_DATA) follows here */
 377 };
 378
 379 /* cpl_tx_pkt_lso_core.lso_ctrl fields */
 380 #define S_LSO_TCPHDR_LEN    0
 381 #define M_LSO_TCPHDR_LEN    0xF
 382 #define V_LSO_TCPHDR_LEN(x) ((x) << S_LSO_TCPHDR_LEN)
 383 #define G_LSO_TCPHDR_LEN(x) (((x) >> S_LSO_TCPHDR_LEN) & M_LSO_TCPHDR_LEN)
 384
 385 #define S_LSO_IPHDR_LEN    4
 386 #define M_LSO_IPHDR_LEN    0xFFF
 387 #define V_LSO_IPHDR_LEN(x) ((x) << S_LSO_IPHDR_LEN)
 388 #define G_LSO_IPHDR_LEN(x) (((x) >> S_LSO_IPHDR_LEN) & M_LSO_IPHDR_LEN)
 389
 390 #define S_LSO_ETHHDR_LEN    16
 391 #define M_LSO_ETHHDR_LEN    0xF
 392 #define V_LSO_ETHHDR_LEN(x) ((x) << S_LSO_ETHHDR_LEN)
 393 #define G_LSO_ETHHDR_LEN(x) (((x) >> S_LSO_ETHHDR_LEN) & M_LSO_ETHHDR_LEN)
 394
 395 #define S_LSO_IPV6    20
 396 #define V_LSO_IPV6(x) ((x) << S_LSO_IPV6)
 397 #define F_LSO_IPV6    V_LSO_IPV6(1U)
 398
 399 #define S_LSO_LAST_SLICE    22
 400 #define V_LSO_LAST_SLICE(x) ((x) << S_LSO_LAST_SLICE)
 401 #define F_LSO_LAST_SLICE    V_LSO_LAST_SLICE(1U)
 402
 403 #define S_LSO_FIRST_SLICE    23
 404 #define V_LSO_FIRST_SLICE(x) ((x) << S_LSO_FIRST_SLICE)
 405 #define F_LSO_FIRST_SLICE    V_LSO_FIRST_SLICE(1U)
 406
 407 #define S_LSO_OPCODE    24
 408 #define M_LSO_OPCODE    0xFF
 409 #define V_LSO_OPCODE(x) ((x) << S_LSO_OPCODE)
 410 #define G_LSO_OPCODE(x) (((x) >> S_LSO_OPCODE) & M_LSO_OPCODE)
 411
 412 #define S_LSO_T5_XFER_SIZE         0
 413 #define M_LSO_T5_XFER_SIZE    0xFFFFFFF
 414 #define V_LSO_T5_XFER_SIZE(x) ((x) << S_LSO_T5_XFER_SIZE)
 415 #define G_LSO_T5_XFER_SIZE(x) (((x) >> S_LSO_T5_XFER_SIZE) & M_LSO_T5_XFER_SIZE)
 416
 417 struct cpl_rx_pkt {
 418         RSS_HDR;
 419         __u8 opcode;
 420 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
 421         __u8 iff:4;
 422         __u8 csum_calc:1;
 423         __u8 ipmi_pkt:1;
 424         __u8 vlan_ex:1;
 425         __u8 ip_frag:1;
 426 #else
 427         __u8 ip_frag:1;
 428         __u8 vlan_ex:1;
 429         __u8 ipmi_pkt:1;
 430         __u8 csum_calc:1;
 431         __u8 iff:4;
 432 #endif
 433         __be16 csum;
 434         __be16 vlan;
 435         __be16 len;
 436         __be32 l2info;
 437         __be16 hdr_len;
 438         __be16 err_vec;
 439 };
 440
 441 struct cpl_l2t_write_req {
 442         WR_HDR;
 443         union opcode_tid ot;
 444         __be16 params;
 445         __be16 l2t_idx;
 446         __be16 vlan;
 447         __u8   dst_mac[6];
 448 };
 449
 450 /* cpl_l2t_write_req.params fields */
 451 #define S_L2T_W_PORT    8
 452 #define V_L2T_W_PORT(x) ((x) << S_L2T_W_PORT)
 453
 454 #define S_L2T_W_LPBK    10
 455 #define V_L2T_W_LPBK(x) ((x) << S_L2T_W_LPBK)
 456
 457 #define S_L2T_W_ARPMISS         11
 458 #define V_L2T_W_ARPMISS(x)      ((x) << S_L2T_W_ARPMISS)
 459
 460 #define S_L2T_W_NOREPLY    15
 461 #define V_L2T_W_NOREPLY(x) ((x) << S_L2T_W_NOREPLY)
 462
 463 struct cpl_l2t_write_rpl {
 464         RSS_HDR
 465         union opcode_tid ot;
 466         __u8 status;
 467         __u8 rsvd[3];
 468 };
 469
 470 struct cpl_smt_write_req {
 471         WR_HDR;
 472         union opcode_tid ot;
 473         __be32 params;
 474         __be16 pfvf1;
 475         __u8   src_mac1[6];
 476         __be16 pfvf0;
 477         __u8   src_mac0[6];
 478 };
 479
 480 struct cpl_t6_smt_write_req {
 481         WR_HDR;
 482         union opcode_tid ot;
 483         __be32 params;
 484         __be64 tag;
 485         __be16 pfvf0;
 486         __u8   src_mac0[6];
 487         __be32 local_ip;
 488         __be32 rsvd;
 489 };
 490
 491 struct cpl_smt_write_rpl {
 492         RSS_HDR
 493         union opcode_tid ot;
 494         u8 status;
 495         u8 rsvd[3];
 496 };
 497
 498 /* cpl_smt_{read,write}_req.params fields */
 499 #define S_SMTW_OVLAN_IDX    16
 500 #define V_SMTW_OVLAN_IDX(x) ((x) << S_SMTW_OVLAN_IDX)
 501
 502 #define S_SMTW_IDX    20
 503 #define V_SMTW_IDX(x) ((x) << S_SMTW_IDX)
 504
 505 #define S_SMTW_NORPL    31
 506 #define V_SMTW_NORPL(x) ((x) << S_SMTW_NORPL)
 507
 508 /* rx_pkt.l2info fields */
 509 #define S_RXF_UDP    22
 510 #define V_RXF_UDP(x) ((x) << S_RXF_UDP)
 511 #define F_RXF_UDP    V_RXF_UDP(1U)
 512
 513 #define S_RXF_TCP    23
 514 #define V_RXF_TCP(x) ((x) << S_RXF_TCP)
 515 #define F_RXF_TCP    V_RXF_TCP(1U)
 516
 517 #define S_RXF_IP    24
 518 #define V_RXF_IP(x) ((x) << S_RXF_IP)
 519 #define F_RXF_IP    V_RXF_IP(1U)
 520
 521 #define S_RXF_IP6    25
 522 #define V_RXF_IP6(x) ((x) << S_RXF_IP6)
 523 #define F_RXF_IP6    V_RXF_IP6(1U)
 524
 525 /* rx_pkt.err_vec fields */
 526 /* In T6, rx_pkt.err_vec indicates
 527  * RxError Error vector (16b) or
 528  * Encapsulating header length (8b),
 529  * Outer encapsulation type (2b) and
 530  * compressed error vector (6b) if CRxPktEnc is
 531  * enabled in TP_OUT_CONFIG
 532  */
 533 #define S_T6_COMPR_RXERR_VEC    0
 534 #define M_T6_COMPR_RXERR_VEC    0x3F
 535 #define V_T6_COMPR_RXERR_VEC(x) ((x) << S_T6_COMPR_RXERR_VEC)
 536 #define G_T6_COMPR_RXERR_VEC(x) \
 537         (((x) >> S_T6_COMPR_RXERR_VEC) & M_T6_COMPR_RXERR_VEC)
 538
 539 /* cpl_fw*.type values */
 540 enum {
 541         FW_TYPE_RSSCPL = 4,
 542 };
 543
 544 struct cpl_fw4_msg {
 545         RSS_HDR;
 546         u8 opcode;
 547         u8 type;
 548         __be16 rsvd0;
 549         __be32 rsvd1;
 550         __be64 data[2];
 551 };
 552
 553 struct cpl_fw6_msg {
 554         RSS_HDR;
 555         u8 opcode;
 556         u8 type;
 557         __be16 rsvd0;
 558         __be32 rsvd1;
 559         __be64 data[4];
 560 };
 561
 562 /* ULP_TX opcodes */
 563 enum {
 564         ULP_TX_PKT = 4
 565 };
 566
 567 enum {
 568         ULP_TX_SC_NOOP = 0x80,
 569         ULP_TX_SC_IMM  = 0x81,
 570         ULP_TX_SC_DSGL = 0x82,
 571         ULP_TX_SC_ISGL = 0x83
 572 };
 573
 574 #define S_ULPTX_CMD    24
 575 #define M_ULPTX_CMD    0xFF
 576 #define V_ULPTX_CMD(x) ((x) << S_ULPTX_CMD)
 577
 578 #define S_ULP_TX_SC_MORE 23
 579 #define V_ULP_TX_SC_MORE(x) ((x) << S_ULP_TX_SC_MORE)
 580 #define F_ULP_TX_SC_MORE  V_ULP_TX_SC_MORE(1U)
 581
 582 struct ulptx_sge_pair {
 583         __be32 len[2];
 584         __be64 addr[2];
 585 };
 586
 587 struct ulptx_sgl {
 588         __be32 cmd_nsge;
 589         __be32 len0;
 590         __be64 addr0;
 591
 592 #if !(defined C99_NOT_SUPPORTED)
 593         struct ulptx_sge_pair sge[0];
 594 #endif
 595
 596 };
 597
 598 struct ulptx_idata {
 599         __be32 cmd_more;
 600         __be32 len;
 601 };
 602
 603 #define S_ULPTX_NSGE    0
 604 #define M_ULPTX_NSGE    0xFFFF
 605 #define V_ULPTX_NSGE(x) ((x) << S_ULPTX_NSGE)
 606
 607 struct ulp_txpkt {
 608         __be32 cmd_dest;
 609         __be32 len;
 610 };
 611
 612 /* ulp_txpkt.cmd_dest fields */
 613 #define S_ULP_TXPKT_DEST    16
 614 #define M_ULP_TXPKT_DEST    0x3
 615 #define V_ULP_TXPKT_DEST(x) ((x) << S_ULP_TXPKT_DEST)
 616
 617 #define S_ULP_TXPKT_FID     4
 618 #define M_ULP_TXPKT_FID     0x7ff
 619 #define V_ULP_TXPKT_FID(x)  ((x) << S_ULP_TXPKT_FID)
 620
 621 #define S_ULP_TXPKT_RO      3
 622 #define V_ULP_TXPKT_RO(x) ((x) << S_ULP_TXPKT_RO)
 623 #define F_ULP_TXPKT_RO V_ULP_TXPKT_RO(1U)
 624
 625 #endif  /* T4_MSG_H */