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69b5dc9f OM |
1 | /*++\r |
2 | \r | |
b0393756 | 3 | Copyright (c) 2013-2017, ARM Ltd. All rights reserved.<BR>\r |
69b5dc9f OM |
4 | \r |
5 | This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | --*/\r | |
14 | \r | |
15 | #include "ArmGicDxe.h"\r | |
16 | \r | |
17 | VOID\r | |
18 | EFIAPI\r | |
19 | IrqInterruptHandler (\r | |
20 | IN EFI_EXCEPTION_TYPE InterruptType,\r | |
21 | IN EFI_SYSTEM_CONTEXT SystemContext\r | |
22 | );\r | |
23 | \r | |
24 | VOID\r | |
25 | EFIAPI\r | |
26 | ExitBootServicesEvent (\r | |
27 | IN EFI_EVENT Event,\r | |
28 | IN VOID *Context\r | |
29 | );\r | |
30 | \r | |
69b5dc9f | 31 | // Making this global saves a few bytes in image size\r |
69b5dc9f OM |
32 | EFI_HANDLE gHardwareInterruptHandle = NULL;\r |
33 | \r | |
69b5dc9f | 34 | // Notifications\r |
69b5dc9f OM |
35 | EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;\r |
36 | \r | |
37 | // Maximum Number of Interrupts\r | |
38 | UINTN mGicNumInterrupts = 0;\r | |
39 | \r | |
40 | HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers = NULL;\r | |
41 | \r | |
8659306a AB |
42 | \r |
43 | /**\r | |
44 | Calculate GICD_ICFGRn base address and corresponding bit\r | |
45 | field Int_config[1] of the GIC distributor register.\r | |
46 | \r | |
47 | @param Source Hardware source of the interrupt.\r | |
48 | @param RegAddress Corresponding GICD_ICFGRn base address.\r | |
49 | @param Config1Bit Bit number of F Int_config[1] bit in the register.\r | |
50 | \r | |
51 | @retval EFI_SUCCESS Source interrupt supported.\r | |
52 | @retval EFI_UNSUPPORTED Source interrupt is not supported.\r | |
53 | **/\r | |
54 | EFI_STATUS\r | |
55 | GicGetDistributorIcfgBaseAndBit (\r | |
56 | IN HARDWARE_INTERRUPT_SOURCE Source,\r | |
57 | OUT UINTN *RegAddress,\r | |
58 | OUT UINTN *Config1Bit\r | |
59 | )\r | |
60 | {\r | |
61 | UINTN RegIndex;\r | |
62 | UINTN Field;\r | |
63 | \r | |
64 | if (Source >= mGicNumInterrupts) {\r | |
65 | ASSERT(Source < mGicNumInterrupts);\r | |
66 | return EFI_UNSUPPORTED;\r | |
67 | }\r | |
68 | \r | |
69 | RegIndex = Source / ARM_GIC_ICDICFR_F_STRIDE; // NOTE: truncation is significant\r | |
70 | Field = Source % ARM_GIC_ICDICFR_F_STRIDE;\r | |
71 | *RegAddress = PcdGet64 (PcdGicDistributorBase)\r | |
72 | + ARM_GIC_ICDICFR\r | |
73 | + (ARM_GIC_ICDICFR_BYTES * RegIndex);\r | |
74 | *Config1Bit = ((Field * ARM_GIC_ICDICFR_F_WIDTH)\r | |
75 | + ARM_GIC_ICDICFR_F_CONFIG1_BIT);\r | |
76 | \r | |
77 | return EFI_SUCCESS;\r | |
78 | }\r | |
79 | \r | |
80 | \r | |
81 | \r | |
0458b423 OM |
82 | /**\r |
83 | Register Handler for the specified interrupt source.\r | |
84 | \r | |
85 | @param This Instance pointer for this protocol\r | |
86 | @param Source Hardware source of the interrupt\r | |
87 | @param Handler Callback for interrupt. NULL to unregister\r | |
88 | \r | |
89 | @retval EFI_SUCCESS Source was updated to support Handler.\r | |
90 | @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r | |
91 | \r | |
92 | **/\r | |
93 | EFI_STATUS\r | |
94 | EFIAPI\r | |
95 | RegisterInterruptSource (\r | |
96 | IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r | |
97 | IN HARDWARE_INTERRUPT_SOURCE Source,\r | |
98 | IN HARDWARE_INTERRUPT_HANDLER Handler\r | |
99 | )\r | |
100 | {\r | |
599f004b | 101 | if (Source >= mGicNumInterrupts) {\r |
0458b423 OM |
102 | ASSERT(FALSE);\r |
103 | return EFI_UNSUPPORTED;\r | |
104 | }\r | |
105 | \r | |
106 | if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {\r | |
107 | return EFI_INVALID_PARAMETER;\r | |
108 | }\r | |
109 | \r | |
110 | if ((Handler != NULL) && (gRegisteredInterruptHandlers[Source] != NULL)) {\r | |
111 | return EFI_ALREADY_STARTED;\r | |
112 | }\r | |
113 | \r | |
114 | gRegisteredInterruptHandlers[Source] = Handler;\r | |
115 | \r | |
116 | // If the interrupt handler is unregistered then disable the interrupt\r | |
117 | if (NULL == Handler){\r | |
118 | return This->DisableInterruptSource (This, Source);\r | |
119 | } else {\r | |
120 | return This->EnableInterruptSource (This, Source);\r | |
121 | }\r | |
122 | }\r | |
123 | \r | |
69b5dc9f OM |
124 | EFI_STATUS\r |
125 | InstallAndRegisterInterruptService (\r | |
126 | IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,\r | |
8659306a | 127 | IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol,\r |
69b5dc9f OM |
128 | IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,\r |
129 | IN EFI_EVENT_NOTIFY ExitBootServicesEvent\r | |
130 | )\r | |
131 | {\r | |
132 | EFI_STATUS Status;\r | |
133 | EFI_CPU_ARCH_PROTOCOL *Cpu;\r | |
b0393756 EL |
134 | CONST UINTN RihArraySize =\r |
135 | (sizeof(HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts);\r | |
69b5dc9f OM |
136 | \r |
137 | // Initialize the array for the Interrupt Handlers\r | |
b0393756 | 138 | gRegisteredInterruptHandlers = AllocateZeroPool (RihArraySize);\r |
69b5dc9f OM |
139 | if (gRegisteredInterruptHandlers == NULL) {\r |
140 | return EFI_OUT_OF_RESOURCES;\r | |
141 | }\r | |
142 | \r | |
143 | Status = gBS->InstallMultipleProtocolInterfaces (\r | |
144 | &gHardwareInterruptHandle,\r | |
b0393756 EL |
145 | &gHardwareInterruptProtocolGuid,\r |
146 | InterruptProtocol,\r | |
8659306a AB |
147 | &gHardwareInterrupt2ProtocolGuid,\r |
148 | Interrupt2Protocol,\r | |
69b5dc9f OM |
149 | NULL\r |
150 | );\r | |
151 | if (EFI_ERROR (Status)) {\r | |
152 | return Status;\r | |
153 | }\r | |
154 | \r | |
69b5dc9f | 155 | // Get the CPU protocol that this driver requires.\r |
69b5dc9f OM |
156 | Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);\r |
157 | if (EFI_ERROR (Status)) {\r | |
158 | return Status;\r | |
159 | }\r | |
160 | \r | |
69b5dc9f | 161 | // Unregister the default exception handler.\r |
69b5dc9f OM |
162 | Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL);\r |
163 | if (EFI_ERROR (Status)) {\r | |
164 | return Status;\r | |
165 | }\r | |
166 | \r | |
69b5dc9f | 167 | // Register to receive interrupts\r |
b0393756 EL |
168 | Status = Cpu->RegisterInterruptHandler (\r |
169 | Cpu,\r | |
170 | ARM_ARCH_EXCEPTION_IRQ,\r | |
171 | InterruptHandler\r | |
172 | );\r | |
69b5dc9f OM |
173 | if (EFI_ERROR (Status)) {\r |
174 | return Status;\r | |
175 | }\r | |
176 | \r | |
177 | // Register for an ExitBootServicesEvent\r | |
b0393756 EL |
178 | Status = gBS->CreateEvent (\r |
179 | EVT_SIGNAL_EXIT_BOOT_SERVICES,\r | |
180 | TPL_NOTIFY,\r | |
181 | ExitBootServicesEvent,\r | |
182 | NULL,\r | |
183 | &EfiExitBootServicesEvent\r | |
184 | );\r | |
69b5dc9f OM |
185 | \r |
186 | return Status;\r | |
187 | }\r |