projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 69b5dc9f OM |
1 | /*++\r |
| 2 | \r | |
| b0393756 | 3 | Copyright (c) 2013-2017, ARM Ltd. All rights reserved.<BR>\r |
| 69b5dc9f OM |
4 | \r |
| 5 | This program and the accompanying materials\r | |
| 6 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 7 | which accompanies this distribution. The full text of the license may be found at\r | |
| 8 | http://opensource.org/licenses/bsd-license.php\r | |
| 9 | \r | |
| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | \r | |
| 13 | --*/\r | |
| 14 | \r | |
| 15 | #ifndef __ARM_GIC_DXE_H__\r | |
| 16 | #define __ARM_GIC_DXE_H__\r | |
| 17 | \r | |
| f5241b57 | 18 | #include <Library/ArmGicLib.h>\r |
| 69b5dc9f OM |
19 | #include <Library/ArmLib.h>\r |
| 20 | #include <Library/DebugLib.h>\r | |
| f5241b57 | 21 | #include <Library/IoLib.h>\r |
| 69b5dc9f OM |
22 | #include <Library/MemoryAllocationLib.h>\r |
| 23 | #include <Library/UefiBootServicesTableLib.h>\r | |
| 61a7b0ec | 24 | #include <Library/UefiLib.h>\r |
| 69b5dc9f OM |
25 | \r |
| 26 | #include <Protocol/Cpu.h>\r | |
| 27 | #include <Protocol/HardwareInterrupt.h>\r | |
| 8659306a | 28 | #include <Protocol/HardwareInterrupt2.h>\r |
| 69b5dc9f OM |
29 | \r |
| 30 | extern UINTN mGicNumInterrupts;\r | |
| 31 | extern HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers;\r | |
| 32 | \r | |
| 69b5dc9f | 33 | // Common API\r |
| 69b5dc9f OM |
34 | EFI_STATUS\r |
| 35 | InstallAndRegisterInterruptService (\r | |
| 36 | IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol,\r | |
| 8659306a | 37 | IN EFI_HARDWARE_INTERRUPT2_PROTOCOL *Interrupt2Protocol,\r |
| 69b5dc9f OM |
38 | IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler,\r |
| 39 | IN EFI_EVENT_NOTIFY ExitBootServicesEvent\r | |
| 40 | );\r | |
| 41 | \r | |
| 0458b423 OM |
42 | EFI_STATUS\r |
| 43 | EFIAPI\r | |
| 44 | RegisterInterruptSource (\r | |
| 45 | IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r | |
| 46 | IN HARDWARE_INTERRUPT_SOURCE Source,\r | |
| 47 | IN HARDWARE_INTERRUPT_HANDLER Handler\r | |
| 48 | );\r | |
| 49 | \r | |
| f5241b57 | 50 | // GicV2 API\r |
| f5241b57 OM |
51 | EFI_STATUS\r |
| 52 | GicV2DxeInitialize (\r | |
| 53 | IN EFI_HANDLE ImageHandle,\r | |
| 54 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
| 55 | );\r | |
| 56 | \r | |
| 5f81082e | 57 | // GicV3 API\r |
| 5f81082e OM |
58 | EFI_STATUS\r |
| 59 | GicV3DxeInitialize (\r | |
| 60 | IN EFI_HANDLE ImageHandle,\r | |
| 61 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
| 62 | );\r | |
| 63 | \r | |
| 8659306a AB |
64 | \r |
| 65 | // Shared code\r | |
| 66 | \r | |
| 67 | /**\r | |
| 68 | Calculate GICD_ICFGRn base address and corresponding bit\r | |
| 69 | field Int_config[1] of the GIC distributor register.\r | |
| 70 | \r | |
| 71 | @param Source Hardware source of the interrupt.\r | |
| 72 | @param RegAddress Corresponding GICD_ICFGRn base address.\r | |
| 73 | @param Config1Bit Bit number of F Int_config[1] bit in the register.\r | |
| 74 | \r | |
| 75 | @retval EFI_SUCCESS Source interrupt supported.\r | |
| 76 | @retval EFI_UNSUPPORTED Source interrupt is not supported.\r | |
| 77 | **/\r | |
| 78 | EFI_STATUS\r | |
| 79 | GicGetDistributorIcfgBaseAndBit (\r | |
| 80 | IN HARDWARE_INTERRUPT_SOURCE Source,\r | |
| 81 | OUT UINTN *RegAddress,\r | |
| 82 | OUT UINTN *Config1Bit\r | |
| 83 | );\r | |
| 84 | \r | |
| 69b5dc9f | 85 | #endif\r |